Bob Cordell Interview: Error Correction

Bonsai said:
Great thread guys.

I have to comment though that when I go back to look at Hawksford's original EC proposal as implemented by Bob Cordell, it was elegant and simple (although the underlying theory may not be, as evidenced by the discussion on this thread).

I can see some of the proposals being made here could be effectively implemented on an IC, but are they practical in a real world discrete amp?

Looking at Andy_C and Mikeks ideas, a lot of the active circuitry could go into an IC. Maybe someone from the IC industry (Maxim? LTC? Natsemi?) is around - how about a some EC building blocks available in IC format.

No doubt the zero feedback crew will get excited about the possibilities of output stages with EC distortion down at the 0.003% level, though I don't count myself in that number.


I agree, this is a great thread, and the analytical discussions and simulations have raised some interesting issues. Yes, it would be nice if an IC company got interested, although this is a funny industry in some ways for that (having been a linear IC designer myself). Quantities are probably a bit on the low side, and there is probably as much high-end aversion to the use of ICs as there is to negative feedback, whether that aversion is justified or not.

Also, some of the low-feedback advocates might logically be excited about this, but one needs to recognize that there are several different religious sects among the low-feedback believers. For example, there are those for whom local feedback in tight loops is OK as long as there is no global feedback. But there are also the more strict sects where even local feedback loops are forbidden. The "feedback-in-disguise" view of EC might not go over too well in this case. And if any of them got wind of the view that EC included POSITIVE feedback, God knows how much fire and brimstone would reign down on them and their ancestors if they used it 🙂.

Cheers,
Bob
 
Bob Cordell said:

..... Yes, it would be nice if an IC company got interested, although this is a funny industry in some ways for that (having been a linear IC designer myself). .....

Here is my challenge:

- 6 dB or thereabouts difference (not necessarily differential [*]) amplifier.
- 50 MHz or higher corner frequency.
- Ultra high linearity (0.00001% THD, preferably better).
- Capable of swinging +/- 5V or thereabouts on 1K loads.

Operational amplifiers in disguise need not apply. The idea is a fairly structurally simple high performance analog process device.

This should be a perfect building block for global EC.

[*] Meaning inputs could be driven indifferently with sizable signals (e.g. +/- 2 V) without mutual restrictions.


Rodolfo
 
Bob Cordell said:
But there are also the more strict sects where even local feedback loops are forbidden.
I encountered some of these people on R.A.T.... I don't understand how their aim can be realistic at all. Even a simple emitter follower has feedback, and a triode has internal feedback. It seems to me, you can't really escape all feedback.
 
Nixie said:

I encountered some of these people on R.A.T.... I don't understand how their aim can be realistic at all. Even a simple emitter follower has feedback, and a triode has internal feedback. It seems to me, you can't really escape all feedback.

Hehe, I guess they achieve their aim by patently proclaiming anyone who points out what you have, a heretic, i.e. close their eyes and refuse to see.

Regarding an EC 'chip', perhaps a small hybrid circuit? Kind of like a module made in SMD... Although, even a 'twilight semiconductor process' plant would be able to make a chip out of this I think. That being said, if i were the one operating such a plant, I think there would be a couple things ahead on my short list - like VFETs 🙂 (No, i don't mean VMOS)...
 
ilimzn said:


Hehe, I guess they achieve their aim by patently proclaiming anyone who points out what you have, a heretic, i.e. close their eyes and refuse to see.

Regarding an EC 'chip', perhaps a small hybrid circuit? Kind of like a module made in SMD... Although, even a 'twilight semiconductor process' plant would be able to make a chip out of this I think. That being said, if i were the one operating such a plant, I think there would be a couple things ahead on my short list - like VFETs 🙂 (No, i don't mean VMOS)...


Actually, in fact, such an EC chip would want to be built in a rather advanced full-complementary wideband linear IC process, not unlike some of the very best processes that Analog Devices has. Vertical PNPs with ft of at least 350 MHz are desirable for this application. Some degree of dielectric isolation might also be desirable. Even then, unless one used a very high voltage bipolar linear process, you would have to have discrete transistor circuits on the outside to bootstrap the EC chip to the signal swing.

Bob
 
Bob Cordell said:

Actually, in fact, such an EC chip would want to be built in a rather advanced full-complementary wideband linear IC process, not unlike some of the very best processes that Analog Devices has. Vertical PNPs with ft of at least 350 MHz are desirable for this application.


Yes, and these were a BIG problem with older processes. This is in fact why i mentioned a hybrid, or a module. At least you can chose the discrete BJTs as you see fit.
On the other hand, I seem to remember Hawksford did a lot of work on various topologies to minimize distortion and increase linearity, it would be interesting to know which ones have been used in OP-amps currently in production, and that includes output stage EC.
 
mikeks, I still don't understand why Hawksford chose to have both an attenuation a = 1 / A_t, and an amplifier R = A_t. Isn't it better to just attenuate and not have an amplifier?

My maths may be wrong, but what I figured was this:
Again looking at figure 3-1, consider his equation 3-1:
A_h = N - b(N - R) / (1 + a(N - R))
Now, if we only have error feedback and not feedforward, b = 0 and the equation becomes
A_h = N / (1 + a(N - R))
With E_h = A_h / A_t - 1, solving for E_h = 0 you get the condition a = 1 / A_t and R = A_t, where R is the reference amplifier's gain.
Now, if trying attenuation of the output sample instead of having an amp, then R = 1 and the second N term is replaced with N / A_t:
A_h = N / (1 + a (N / A_t - 1))
If then a = 1, A_h = A_t, and E_h = 0 achieves error null.
Thus, this approach also works.
So, which is easier to make more precise, a reference amplifier of gain R = A_t, or high quality passive attenuator 1 / A_t (and you still need to attenuate in the first case anyway as a = 1 / A_t)?
 
ingrast said:
The AD797 uses EC in the output stage....

Where? How?
 

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Bob Cordell said:



....unless one used a very high voltage bipolar linear process, you would have to have discrete transistor circuits on the outside to bootstrap the EC chip to the signal swing.

Bob


What I suggested earlier is to limit the EC chip to low level signal processing, coupled with a simple, moderate voltage gain power stage (12 - 20 dB at most).

This does away with high voltage processes and allows for a very high performance EC engine. The output stage in this case should not have (neither need) local EC, only careful planning for bias, crossover performance and basic linearity (about 1% THD). Local regular NFB good idea.

Rodolfo
 
Continuing from here.

I have looked at your fascinating scheme and found a few things to modify; see attachment.

1. R8/R5 increased to minimise dissipation in Q9/10.

2. Q13/14 collectors returned to the rails for the same reason.

3. I1/2 reduced to 8mA for the same reason.

4.Q9/10 BJT instead of FET.

5. R9=R8//R5 to minimise DC-offset in the error amps.

6. Error amps bootstrapped by Q9/10.

Ultimately, however, your arrangement is only feasible, it would appear, with a HEXFET output stage to provide the error extractor with the headroom it requires to operate, while maintaining class-B/AB operation.

This is analogous to the issue noted here.
 

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Mike,
One thing you should know was that I just lifted bits and pieces of circuitry from a sim of a high-power error correction amp. As such, some aspects of the design don't make sense in the context of a low-power amp. But regardless of ouput power, I'd say it's probably not a good idea to have the drivers also load the error correction diff amp. I only did so for illustration and comparison purposes since your original schematic in this post did so as well. Also, even if a MOSFET output stage is used, the drivers should be at least TO-126 devices so they can run at high enough currents to keep the distortion as low as possible.

mikeks said:
1. R8/R5 increased to minimise dissipation in Q9/10.

The idea of Q9 and Q10 (I'll use the reference designators from your latest post) is to allow a higher bias current in the drivers than would be possible if the drivers were not bootstrapped - thus reducing distortion. In my original design, Q9 and Q10 supplied the voltages only to device collectors (or drains if FETs were to be used). Since they were partially out of the signal path in this sense in the original design, the idea was for them to take the abuse of the higher power dissipation that results. The net result of increasing R8 and R5 is to increase distortion.

2. Q13/14 collectors returned to the rails for the same reason.

In the high-power design this was lifted from, I would have needed 250V devices to do this. One recurring theme of this design is to use bootstrapping or cascoding wherever possible so that faster, low-voltage parts can be used wherever possible in the direct signal path.

3. I1/2 reduced to 8mA for the same reason.

Okay.

4.Q9/10 BJT instead of FET.

Okay.

5. R9=R8//R5 to minimise DC-offset in the error amps.

Okay. But be aware that the CFPs can have nasty peaking in their frequency response. The rather high base resistance is what tames this. They should be simulated by themselves first so that their bandwidth is maximized while at the same time eliminating the peaking in their high-frequency response. The base spreading resistance has a strong effect here, as you'll see when trying different models. One interesting thing I found was that the OnSemi datasheets of the BC550c and BC560c have graphs of base spreading resistance vs. current - very unusual and welcome.

6. Error amps bootstrapped by Q9/10.

Yikes. The whole point of my original arrangement, as I mentioned before, was to have these devices be out of the direct signal path, supplying only collector or drain voltages as the case may be. Now they're directly in the signal path, increasing the distortion.

Ultimately, however, your arrangement is only feasible, it would appear, with a HEXFET output stage(...)

Yes, that was the idea.

I had to fix the file so it included the KSA1220A transistor model for it to run. Then the bias of the output devices was over 2A. When I adjusted the bias to 150 mA, the distortion was 0.01 percent, or almost triple the original design. Then I went back to Bob's design and set the input amplitude to 15V as we've been using. It had 0.008 percent distortion. So there's an increase in complexity and distortion - not what I was trying to accomplish at all! In additon, the bandwidth is now lower, and there is now peaking in the frequency response due to the removal of the shunt capacitor from the LPF ahead of the diff amp.
 
andy_c said:
I had to fix the file so it included the KSA1220A transistor model for it to run. Then the bias of the output devices was over 2A. When I adjusted the bias to 150 mA, the distortion was 0.01 percent, or almost triple the original design.

Yes, i included the KSA1220A transistor model in the zip file, but forgot to .include it on the schematic.

andy_c said:
Then I went back to Bob's design and set the input amplitude to 15V as we've been using. It had 0.008 percent distortion.

Interesting. This is roughly what i obtain with a modified version of this arrangement, which works fine with MOSFETs and BJTs.

More work to do; I'll be in touch! :nod:
 

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mikeks said:
Yes, i included the KSA1220A transistor model in the zip file, but forgot to .include it on the schematic.

Yes, that's what I meant 🙂.

More work to do; I'll be in touch! :nod:

I think it's a very telling statement about Malcolm and Bob that in order to improve on Bob's design from a distortion perspective, it seems to be necessary to introduce a lot of complexity. And once that much complexity has been added, it makes sense (to me at least) that one should try for higher output power.

I'll be "laying low" in this thread for a while, as personal and family things are intervening.
 
andy_c said:


Yes, that's what I meant 🙂.



I think it's a very telling statement about Malcolm and Bob that in order to improve on Bob's design from a distortion perspective, it seems to be necessary to introduce a lot of complexity. And once that much complexity has been added, it makes sense (to me at least) that one should try for higher output power.

I'll be "laying low" in this thread for a while, as personal and family things are intervening.


I think the ''complexity'' is only from appearances alone, and not substance.

For instance the number of drivers in series here is actually reduced.