Cont.
If zero Vce will be an issue it is allways the option to put them in series insted, that way it is also possible to keep one of the two on at all times.
/Anders
If zero Vce will be an issue it is allways the option to put them in series insted, that way it is also possible to keep one of the two on at all times.
/Anders
Nelson Pass said:
I'm not in any hurry, as I need to build my F5s first, however I am excited as this is exactly what I've been looking for! It's as if the great Nelson Pass has read my mind!
-Justin
Best of all will be the B4.
As far as I know, this kind of device didn't exist before.
And it's ready: we saw many pics!
As far as I know, this kind of device didn't exist before.
And it's ready: we saw many pics!
Re: Re: cont.
I wired something up yesterday but i will not have a chance to try it until tonight, will report as soon as i can!
/Anders
tschrama said:
I wired something up yesterday but i will not have a chance to try it until tonight, will report as soon as i can!
/Anders
playing around with my HP 339A distortion analyzer again this morning, and settled down to measure the B1 schematic and influence of the transistor types and supply voltages. Here goes:
1KHz, 1Vrms out, matched 9mA Idss
18V+ 2SK170: thd = 0.00105% mostly noise, some H2 and H3 ?
2N3819: thd = 0.01120% pure H3
30V+ 2SK170: thd = 0.00090% mostly noise, some H2 and H3 ?
2N3819: thd = 0.00120% mostly noise, some H2 and H3 ?
unmatched JFETS
Idss 11mA as CCS (lower jfet), drived JFET 9mA: THD = 0.00090%
Idss 9mA as drive jfet, CCS 11mA: THD = 0.00115%
Conclusions:
1] 2N3819 need at least 10V more Vsupply, but then will work very well
2] 2nd harmonic is effectively cancelled, at higher output voltages, 3rd harmonic dominates.
3]it's best to keep the higher Idss JFET as the CCS.
Well it's very effective buffer, with low THD (due to canceling of H2?)..
Cheers,
Thijs
PS
did Nelson make a mistake when he write in Side E "A teensy bit of second harmonic" .. I would think he means 3rd harmonic..
1KHz, 1Vrms out, matched 9mA Idss
18V+ 2SK170: thd = 0.00105% mostly noise, some H2 and H3 ?
2N3819: thd = 0.01120% pure H3
30V+ 2SK170: thd = 0.00090% mostly noise, some H2 and H3 ?
2N3819: thd = 0.00120% mostly noise, some H2 and H3 ?
unmatched JFETS
Idss 11mA as CCS (lower jfet), drived JFET 9mA: THD = 0.00090%
Idss 9mA as drive jfet, CCS 11mA: THD = 0.00115%
Conclusions:
1] 2N3819 need at least 10V more Vsupply, but then will work very well
2] 2nd harmonic is effectively cancelled, at higher output voltages, 3rd harmonic dominates.
3]it's best to keep the higher Idss JFET as the CCS.
Well it's very effective buffer, with low THD (due to canceling of H2?)..
Cheers,
Thijs
PS
did Nelson make a mistake when he write in Side E "A teensy bit of second harmonic" .. I would think he means 3rd harmonic..
BTW:
I got High frequency oscilation whitout the 1K input resistor in the 2Sk170, the 2N3819 didn't put I put it in anyway.
I got High frequency oscilation whitout the 1K input resistor in the 2Sk170, the 2N3819 didn't put I put it in anyway.
I wonder what distortion figures you will get when you put a load at the output, say between 500R to 10k ?
And if the bandwidth is already too high that you get oscillations, maybe you should try John Curl's complementary buffer of 2SK170/2SJ74 pair with matched Idss. It will certainly drive loads better.
I also tried Borberly's JFET white follower once, but it has rather poor PSRR. The Taylor follower is another alternative, but you need to know the output load beforehand in order to optimise the modulated CCS.
Patrick
And if the bandwidth is already too high that you get oscillations, maybe you should try John Curl's complementary buffer of 2SK170/2SJ74 pair with matched Idss. It will certainly drive loads better.
I also tried Borberly's JFET white follower once, but it has rather poor PSRR. The Taylor follower is another alternative, but you need to know the output load beforehand in order to optimise the modulated CCS.
Patrick
EUVL said:
Loading the buffer was next on my list...
I guess most of you have read this allready :
http://www.borbelyaudio.com/adobe/ae699bor.pdf
but this, I give it once more... nice bedtime reading material..
🙂
this does not seem right.tschrama said:
Are you biasing the amplifying jFET at above it's Idss? Does the sim allow this?
