I have an soekris 1021 with i2s input.but dont know why to have sound i need to turn on eq or resampling in roon audio. Orginal 16 or 24bit dont work. Soekris Audio ApS, Products dam1021
I have an soekris 1021 with i2s input.but dont know why to have sound i need to turn on eq or resampling in roon audio. Orginal 16 or 24bit dont work. Soekris Audio ApS, Products dam1021
By default FifoPi will follow the original format. But I don't know what was the original format. To address this issue, you need to monitor the real format?
Do you have my ESS controller? You can run it at analyzer mode to watch the format at real time. If would be great too to debug a digital audio system.
Regards,
Ian
I didn't try that software. But FifoPi is software independent. As long as the format is correct, there will be no difference.
So, to address the issue, you need to know what was exactly the format.
Regards,
Ian
So, to address the issue, you need to know what was exactly the format.
Regards,
Ian
@bmxmen
Those are the settings, to debug the issue, you have to know what was the real output format.
Regards,
Ian
Those are the settings, to debug the issue, you have to know what was the real output format.
Regards,
Ian
How to check it?
If you had my ESS controller you can check the real format, unless you have a oscilloscope.
FifoPi support native DSD mode, so it works for HQplayer. But maybe you will need a BridgePi because a RPi doesn't support native DSD through GPIO, have to use a USB streamer like a Amanero Combo384.
Regards,
Ian
Let's continue the FifoPi test.
Jitter measurement sometimes is pretty hard to understand. So just let me make things easy.
Raspberry Pi I2S jitter before FifoPi is so big that we can even watch it directly from waveform with normal digital scope (no need the jitter package). Here is the test result under the same test condition as test (1)
https://www.diyaudio.com/forums/dig...mate-weapon-fight-jitter-533.html#post6284897
RapberryPi 4 B
Volumio play 44.1KHz 16bit music
Pick up SCK signal from RPi GPIO
LC584AXL (jitter package disabled)
Sampling 8GS/s @ input bandwidth 1GHz
Trigger at positive edge and watch the jitter at the following positive edge
swps 10253 times
watch: cycle-cycle period jitter
Testing results
Obviously, we can see both random jitter and domestic jitter directly from the RPi SCK waveform. The random jitter (each group) is around 300ps RMS, it should be the jitter of the internal VCO. The domestic jitter (the two groups) is separated 1200ps in between, looks like that RaspberryPi internal DPLL jumps between two factors for the audio clock. From this waveform we can roughly know how a RaspberryPi generates the audio clock.I don't think an audiophile can live with digital audio signals of this quality.
This measurement is very easy to implement. Anybody with a 200MHz or higher digital scope can do the same test.
https://flic.kr/p/2jqzwsh
RPiSCK44.1K16bitWaveform by Ian, on Flickr
More analyzing
By comparing the SCK waveform and previous jitter measurement result, we can see the two testing results match pretty well.
The two groups of the waveform are corresponding to the two Gaussian distributions in the jitter testing result.
Jitter testing results use a histogram to describe the jitter behavior is exactly the same as what we saw from the waveform.
(Jitter measurement result)
https://flic.kr/p/2joW5t2
RPiSCK44.1K16bitold by Ian, on Flickr
Ian
Hi Ian, this was a nice confirmation, but I am still curious and very much looking forward to, if you also did the measurement after the Fifopi ? with standard and top notch clocks?
"domestic jitter (the two groups) is separated 1200ps in between, looks like that RaspberryPi internal DPLL jumps between two factors for the audio clock"... Is this what seems to be called MASH?
Raspberry Pi Clock jitter and MASH value - YouTube
//
Raspberry Pi Clock jitter and MASH value - YouTube
//
FifoPi jitter test: (3) S/PDIF receiver jitter before FifoPi
Just got some time so let's continue the jitter test.
Here is jitter testing result of a typical S/PDIF receiver, AK4113, with RCA 75 ohm coaxial cable input @44.1KHz music
The first graph is the output MCLK jitter: 45.7ps (3ps jitter measurement noise floor was excluded), which is not bad among all DIR chips. MCLK runs at 5.6448MHz or 128Fs
The second graph is the output SCK jitter: 79.6ps which is a bit higher than I thought. I think AK4113 didn't re-clock signals before outputting I2S. However it's not a big deal if the DAC works in sync mode (with MCLK input).
The third graph is the jitter observation directly from the SCK waveform on my digital scope screen. Only random jitter, no domestic jitter. Seems with analog PLL only.
You can get them compared with jitter test result of a RPi
https://www.diyaudio.com/forums/dig...mate-weapon-fight-jitter-533.html#post6284897
https://www.diyaudio.com/forums/dig...mate-weapon-fight-jitter-539.html#post6290977
Overall, this S/PDIF receiver signal quality is better than the I2S signal from a RPi GPIO. However, to reach a higher audiophile standard, neither of them is acceptable.

SPDIF_MCLK_Jitter_RCA by Ian, on Flickr

SPDIF_SCK_Jitter_44.1KHz_32Bit_RCA by Ian, on Flickr

SPDIF_SCK_Jitter_44.1KHz_32Bit_Waveform_RCA by Ian, on Flickr
Ian
Just got some time so let's continue the jitter test.
Here is jitter testing result of a typical S/PDIF receiver, AK4113, with RCA 75 ohm coaxial cable input @44.1KHz music
The first graph is the output MCLK jitter: 45.7ps (3ps jitter measurement noise floor was excluded), which is not bad among all DIR chips. MCLK runs at 5.6448MHz or 128Fs
The second graph is the output SCK jitter: 79.6ps which is a bit higher than I thought. I think AK4113 didn't re-clock signals before outputting I2S. However it's not a big deal if the DAC works in sync mode (with MCLK input).
The third graph is the jitter observation directly from the SCK waveform on my digital scope screen. Only random jitter, no domestic jitter. Seems with analog PLL only.
You can get them compared with jitter test result of a RPi
https://www.diyaudio.com/forums/dig...mate-weapon-fight-jitter-533.html#post6284897
https://www.diyaudio.com/forums/dig...mate-weapon-fight-jitter-539.html#post6290977
Overall, this S/PDIF receiver signal quality is better than the I2S signal from a RPi GPIO. However, to reach a higher audiophile standard, neither of them is acceptable.

SPDIF_MCLK_Jitter_RCA by Ian, on Flickr

SPDIF_SCK_Jitter_44.1KHz_32Bit_RCA by Ian, on Flickr

SPDIF_SCK_Jitter_44.1KHz_32Bit_Waveform_RCA by Ian, on Flickr
Ian
Last edited:
Ian,
If I have a McFIFO and a FIFOPi in the same train what is the best way to integrate them or is there one? McFIFO has the slave MCLK ability, so could that be run to the FIFOPi in place of the FIFOPI XOs?
If I have a McFIFO and a FIFOPi in the same train what is the best way to integrate them or is there one? McFIFO has the slave MCLK ability, so could that be run to the FIFOPi in place of the FIFOPI XOs?
@wcwc
Using on Fifo in you system would be enough. I don't think you need two of them work together 🙂.
Good weekend.
Ian
Using on Fifo in you system would be enough. I don't think you need two of them work together 🙂.
Good weekend.
Ian
So if I am just using the McFIFO, how do I connect to the receiver pi and the transport pi?
Do I just connect the bit clock, word clock, and data to the u.fl connectors on the TransportPI and the masterclock from the McFIFO to the transportPI mclk u.fl connector? Which mclk connection do I use on the McFIFO? Do I need an isolator between the receiverPI and the TransportPi or anywhere else?
Do I just connect the bit clock, word clock, and data to the u.fl connectors on the TransportPI and the masterclock from the McFIFO to the transportPI mclk u.fl connector? Which mclk connection do I use on the McFIFO? Do I need an isolator between the receiverPI and the TransportPi or anywhere else?
- Home
- Source & Line
- Digital Line Level
- Asynchronous I2S FIFO project, an ultimate weapon to fight the jitter