Totally agree, didn't mean any offence. It's all about the enjoyment of creating something and hearing the end result! But i just wanted to make people aware of how easy/simple the CEN iv circuit is, i don't think it gets the recognition it deserves.
Hi Shane, thanks for the update, i haven't been paying attention and thought transformer coupled was the way to go. Does the DP777 not use transformer coupling?
Nice work on your tube stage, inspiring and a good way to do it without a board. Did you use a 6072A as he prefers?
What is the current source in your schematic?
You're all good mate, probably more me than anything else..
Luke, Yes. All the other info is available via the archives etc.. I'm starting to spend too much time here.
Regards,
Shane
crystal layout
DEM Cct ? Did not John give it up in the last 50 posts of him thread? More jitter in fact than the last alone cap between pin16/17 ? Helas with the staying diode inside the chip...
John said also it will stay because the chip itself always around 120 pico s of jitter with all the best anti-jitter technics choosed around the DAC in the layout...
I think also we need a little crystal board stacked above the left side of the dac with a good crystal (if not laptech, at least NDK, Citizen, Crysteq - NDK is less noisy between 10 hz and 20 k hz)... the best should be to choose a 4 pads emplacement for a NDK crystal in a free place at the left of the chips between the digital gnd and the BCK... because th eimportance of the ground and the decoupling (voltage and decoupling pads for two 605 case smt caps and a vias for voltage supply on the + pad). I suppose a serie pad between the clock pin & the crystal coul allow to put a ferrite bead : let it unpopulated if the crystal is not populated !
DEM Cct ? Did not John give it up in the last 50 posts of him thread? More jitter in fact than the last alone cap between pin16/17 ? Helas with the staying diode inside the chip...
John said also it will stay because the chip itself always around 120 pico s of jitter with all the best anti-jitter technics choosed around the DAC in the layout...
I think also we need a little crystal board stacked above the left side of the dac with a good crystal (if not laptech, at least NDK, Citizen, Crysteq - NDK is less noisy between 10 hz and 20 k hz)... the best should be to choose a 4 pads emplacement for a NDK crystal in a free place at the left of the chips between the digital gnd and the BCK... because th eimportance of the ground and the decoupling (voltage and decoupling pads for two 605 case smt caps and a vias for voltage supply on the + pad). I suppose a serie pad between the clock pin & the crystal coul allow to put a ferrite bead : let it unpopulated if the crystal is not populated !
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Oups...sorry, problem of memory: I has already asked to John him permission and he gave us again what he is using today with DEM counter and I2S attenuation : http://www.diyaudio.com/forums/digi...e-nos-dac-using-tda1541a-503.html#post3920920.
Is it bad to put a four pad clock "island" close to the left of the dac chip or below the pcb and put vias on the midlle of the pads for the ones who want to stack a crystal board for more complex design (frquencies dividers... ?)
If no the first version for a v2 ? Bad idea from me because bad layout (because of the RF needs?) ?
Is it bad to put a four pad clock "island" close to the left of the dac chip or below the pcb and put vias on the midlle of the pads for the ones who want to stack a crystal board for more complex design (frquencies dividers... ?)
If no the first version for a v2 ? Bad idea from me because bad layout (because of the RF needs?) ?
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Eldam,
I would use separate supply for the clock board, so two pads close to the DAC chip could be enough.
The crystal clock board I'm developing (PCB almost ready) provides 2 u.fl. connectors (one for the DAC and the second for the source) and 2 pads to fit the board vertically close to the DAC.
I would use separate supply for the clock board, so two pads close to the DAC chip could be enough.
The crystal clock board I'm developing (PCB almost ready) provides 2 u.fl. connectors (one for the DAC and the second for the source) and 2 pads to fit the board vertically close to the DAC.
Hi Andrea,
Did you obtain your quotation from laptech and did you have a look at NDK vs Crysteq for the crystals ?
Why not have 4 pads for most of the crystals avialable on the coreboard itself ? Because RF (with the dac chip as for the source distance can't be avoid but just minimized with PLL, buffer...)?
What is the best trade off according to you :
-crystal near the source and power supply on a stacked board (assuming supply is less fragile than RF signal).
- or crystal with its PS on a pcb stacked above the Dac chip ?
What is hard putting 4 pads on the core boards as there is space avialable with the BCK and Dgnd not far (one for supply, one for the signal, one for Gnd and one not connected) with vias on the gnd & + V for the stacked pcb ?
Does an uf.l connector allow less crossing ? Caps being below and in the center allow the space for the 4 pads ?
Is the 4 pads not universal between different crystal brands and size ?
For example if you design just for a cuted crystal or a four pad crystal but others people want to put something else, what is the most versatile design in relation to sound quality ?
It seems important as the source are more and more of a SOTA quality : Acko, hifyDuibno e.g.
Anyway, with the 4 connectors uf.l connectors there is a good trade off. Finding a design with four pads and 1 uf.l connector for its signal pad without RF problem in the same time is maybe a problem if the two solution are both on the pcb?
I surmise uf.l connection if SOTA because the impedance matching and the coaxial shield with the gnd to be more jittered than a trace with soldering on a same pcb ? Does uf.l wires exist in 2cm, 3cm ? very short to avoid EMC and more jitter ?
Did you obtain your quotation from laptech and did you have a look at NDK vs Crysteq for the crystals ?
Why not have 4 pads for most of the crystals avialable on the coreboard itself ? Because RF (with the dac chip as for the source distance can't be avoid but just minimized with PLL, buffer...)?
What is the best trade off according to you :
-crystal near the source and power supply on a stacked board (assuming supply is less fragile than RF signal).
- or crystal with its PS on a pcb stacked above the Dac chip ?
What is hard putting 4 pads on the core boards as there is space avialable with the BCK and Dgnd not far (one for supply, one for the signal, one for Gnd and one not connected) with vias on the gnd & + V for the stacked pcb ?
Does an uf.l connector allow less crossing ? Caps being below and in the center allow the space for the 4 pads ?
Is the 4 pads not universal between different crystal brands and size ?
For example if you design just for a cuted crystal or a four pad crystal but others people want to put something else, what is the most versatile design in relation to sound quality ?
It seems important as the source are more and more of a SOTA quality : Acko, hifyDuibno e.g.
Anyway, with the 4 connectors uf.l connectors there is a good trade off. Finding a design with four pads and 1 uf.l connector for its signal pad without RF problem in the same time is maybe a problem if the two solution are both on the pcb?
I surmise uf.l connection if SOTA because the impedance matching and the coaxial shield with the gnd to be more jittered than a trace with soldering on a same pcb ? Does uf.l wires exist in 2cm, 3cm ? very short to avoid EMC and more jitter ?
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But why use a circuit that was bettered by a simple capacitor? The grundig 9009 cct with the DEM synched to BCK is quite a bit simpler and mirrors very closely to the cct provided by Philips themselves.
Discussed here too: http://www.diyaudio.com/forums/digital-line-level/11949-tda1541-dem-reclocking-26.html
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Anyway, it's very simple to add a smt resistors or a bulk ones between the pins.... this doesn't need to add traces on the pcbs. I often forgett what T. said about 3D design for DIY... we don't look for beauty in the eyes but in the ear, if Sound quality don't suffer of a 3D layout here with added little Dale resistor or smt Sussumu it really doesn't matter to have traces for that...BTW, traces can be sometimes worse because too close of an another trace !
Shane, Ryan, did you try both solutions already (with and without the resistors for the DEM clock ? Better result with the non-A (good SF book) TDA1541 which has this cap inside its substrate ?
What do you think of the pads and vias for a crystal ? Crystal & PS stacked above or below the left side of the TDA or just the ps stacked and the crystal on the core-board with two series pad before the pin of the TDA for a serie smt ferrite bead ? Bad compatibilities with the layout and the u.fl already populated ? With vias both solution could be choosed after by each diyer (one vias on the signal trace near the uf.l signal pad and one trace lose to it on the continous gnd plane ?
Sorry to repeat myself, maybe it's important, maybe not, my understanding is low, I just shaking ideas. But here with crystal pads on the core board the second uf.l connector for slaving the source would be putted on the added pcb (with output buffer ?... don't know what Andrea designed here...) !
Shane, Ryan, did you try both solutions already (with and without the resistors for the DEM clock ? Better result with the non-A (good SF book) TDA1541 which has this cap inside its substrate ?
What do you think of the pads and vias for a crystal ? Crystal & PS stacked above or below the left side of the TDA or just the ps stacked and the crystal on the core-board with two series pad before the pin of the TDA for a serie smt ferrite bead ? Bad compatibilities with the layout and the u.fl already populated ? With vias both solution could be choosed after by each diyer (one vias on the signal trace near the uf.l signal pad and one trace lose to it on the continous gnd plane ?
Sorry to repeat myself, maybe it's important, maybe not, my understanding is low, I just shaking ideas. But here with crystal pads on the core board the second uf.l connector for slaving the source would be putted on the added pcb (with output buffer ?... don't know what Andrea designed here...) !
Hi Eldam,
With the DEM... I never really found any improvement when i experimented with "locking" on to Word select... I used an air cap to adjust the frequency. I tested by listening to -60dB recordings... Nothing. The only time i noticed a change was when i tuned it way up to 2Mhz+, recordings at -60dB sounded distorted.
Another thing i noticed when tuning and trying to lock at 88khz is that the DEM circuit seems inherently jittery. When i looked on my scope you could visually see the frequency jumping around never stabilizing. So i went back to DEM frequency of around 260khz and left it at that.
I cant comment too much about oscillators, crystals, and their circuits because it is a bit out of my understanding, but i was thinking it would be great if we could add the oscillator circuit right next to the 1541 and have it run off a single LiFePo cell (3.3V). From what Iancanada was saying there is a big improvement in jitter levels. I've run my entire FIFO off a 6V battery and the improvement is quite noticeable, there seems to be more coherency in the music.
Thank you Ryan for the inputs.
Here I was talking just about the 6K8 shunt resistors with pin 15 (Vdd2) like in the link I gave with the John's answers (and no more about DEM clock with Wds or Bclk which is given up):
"The DEM oscillator is the free running low jitter version:
- 470pF between pins 16 & 17.
- 6K8 between pins 15 & 16.
- 6K8 between pins 15 & 17."
For cloks inputs, maybe Set3up can give an input to add to Andrea's inputs, or Marce for the layout (but here if the crystal is only 11.xxx maybe it doesn't matter but if it is close to 50.xxx because to slave the source (no Fifo here but USB device) with dividers for the dac chip, maybe it's important; My understanding is I saw no usb source ready made with uf.l connector to be slaved but instaed the opposite : output uf.l on the USB board to slave the DAC chip (which is bader in theory than to have the crystal very close to the dac chip). All those device are thinked to improve not "SOTA" design but old shematic... E.g, an acko device is more expensive than a DAC itself (near 300 euros....Eeeekh... but maybe not just for a TDA1541 needs in NOS ?)
Here I was talking just about the 6K8 shunt resistors with pin 15 (Vdd2) like in the link I gave with the John's answers (and no more about DEM clock with Wds or Bclk which is given up):
"The DEM oscillator is the free running low jitter version:
- 470pF between pins 16 & 17.
- 6K8 between pins 15 & 16.
- 6K8 between pins 15 & 17."
For cloks inputs, maybe Set3up can give an input to add to Andrea's inputs, or Marce for the layout (but here if the crystal is only 11.xxx maybe it doesn't matter but if it is close to 50.xxx because to slave the source (no Fifo here but USB device) with dividers for the dac chip, maybe it's important; My understanding is I saw no usb source ready made with uf.l connector to be slaved but instaed the opposite : output uf.l on the USB board to slave the DAC chip (which is bader in theory than to have the crystal very close to the dac chip). All those device are thinked to improve not "SOTA" design but old shematic... E.g, an acko device is more expensive than a DAC itself (near 300 euros....Eeeekh... but maybe not just for a TDA1541 needs in NOS ?)
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