Check C3 is not leaking, measure the resistance from GND to the Gate on the K170. I needs to be 330-350KΩ. A low reading is a failed C3 or K170.
As noted, you have Q1 and Q2 references mixed up.
I agree with Allen. Q3 (your ZTX) is amiss somehow. You get exactly what you are describing with an incorrect fitment here. It sounds like you have what in essence is a forward biased diode junction between where C and B are. It will also give zero bias current which is what your voltages show (the 7.2 volts on both devices)
If there is doubt on the transistor then just put something else generic in its place like a BC 546.
Resistance between Gnd and Gate on the 170 is at 330k
Apologies for still mixing up my Qs. I have some BC550s, 560s, 517,and one ZTX550. Which one should I use?
When you ask is C3 leaking I assume you don't mean physically but electrically? What should I measure?
Thanks. Rob.
PS the ZTX450 is properly orientated as is the one on the working board.
Apologies for still mixing up my Qs. I have some BC550s, 560s, 517,and one ZTX550. Which one should I use?
When you ask is C3 leaking I assume you don't mean physically but electrically? What should I measure?
Thanks. Rob.
PS the ZTX450 is properly orientated as is the one on the working board.
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Yes, I meant leaking electrically. You have proved it is okay with the resistance check you did.
The ZTX450 is an NPN device, so you must use an NPN transistor there. The BC550 is a suitable replacement, BUT the pin out is reversed, you will need to turn it round 180° on the board. (The round part of the transistor will go towards the 'flat' white indicator.) Have a look at the data sheets to understand the pin difference.
If you pop it out carefully, not at all easy, you should be able to test it.
Do not use the ZTX550 or BC560 they are PNP transistors.
The ZTX450 is an NPN device, so you must use an NPN transistor there. The BC550 is a suitable replacement, BUT the pin out is reversed, you will need to turn it round 180° on the board. (The round part of the transistor will go towards the 'flat' white indicator.) Have a look at the data sheets to understand the pin difference.
If you pop it out carefully, not at all easy, you should be able to test it.
Do not use the ZTX550 or BC560 they are PNP transistors.
Thanks for that. These boards with minute solder pad holes are a once only job. If I have to replace parts I snip off the old one leaving some legs and solder to those. I was going to check the datasheet of the pinout of any replacement.
One thing that came to mind given the comments by Mooly that it seemed that the ZTX was incorrectly fitted is to reverse it to see if the screenprint on the board is incorrect. I will not be doing any more on this until tomorrow so if that idea is a no no then perhaps you could let me know.
One thing that came to mind given the comments by Mooly that it seemed that the ZTX was incorrectly fitted is to reverse it to see if the screenprint on the board is incorrect. I will not be doing any more on this until tomorrow so if that idea is a no no then perhaps you could let me know.
They appear to be. I am not sure if this is relevant but the previous kit I built was supplied with 2 identical boards. These are handed L & R and makes me wonder if the ZTX screen print is incorrect. However, the working board has the ZTX orientated the same way towards the 1000uf C2 cap. The ZTX has it's identity markings on the non-flat face which I have never seen before as they are normally on the flat face. Not sure if that is relevant, just an observation.
Couple of pics below. if you were to put the two boards side by side you will see the difference. The board on the silver heatsink is the bad board.
If there is doubt then switch off and do a quick resistance check from each transistor lead to the other components they are supposed to connect to and make sure that both boards are the same connectivity wise.
The ZTX E 7.2V is at one end of P1. K170 G 0.016V is at P1 wiper. Did you try turning P1 in the other direction to increase the voltage at the K170 gate?
As Alan and Mooly said, the ZTX and/or C2 look suspicious too as the voltage at ZTX collector and at the upper mosfet gate looks low - too much current being dropped by R7.
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I am going to be in and out today, but I will check these points when I can and report back.
Have not had a chance to do much on this but I did measure the voltage at K170 gate and the reading after turning P1 CW the max voltage is around 2.7v. CCW it initially shows a voltage of around 5v but slowly drops to around zero. On the good board PI gives a higher voltage when turmed CCW, so on this board is doing the opposite.
All the input FET can do is alter its conductivity (think resistance) between D and S. That resistance develops a voltage across R9 and when that reaches a high enough value the power FET Q1 begins to conduct.
You are measuring around 430 millivolts on R9 which means the input FET is essentially non conducting and so the lower power FET is OFF however you also show that the upper power FET has around 7 volts on the source and also that no current is flowing in either power FET. That result to me seems to move the problem away from the input FET and more toward Q3 because if the input FET is not conducting then the gate of the upper power FET would rise toward the 24 volt rail and that isn't happening.
If the input FET was conducting then you would have more voltage across R9 and so the lower FET would be conducting but with the current limited by the upper FET and Q3. Your readings all show the power FET's are non conducting however.
(All this assumes there is only one problem and not multiple issues)
So I still think the issue is in or around Q3.
If C3 was fitted the wrong way around then the leakage might be enough to give similar results to what you are measuring but that would be very much on a knife edge and I would expect your measured results to be variable and not so consistent. Worth checking though.
You are measuring around 430 millivolts on R9 which means the input FET is essentially non conducting and so the lower power FET is OFF however you also show that the upper power FET has around 7 volts on the source and also that no current is flowing in either power FET. That result to me seems to move the problem away from the input FET and more toward Q3 because if the input FET is not conducting then the gate of the upper power FET would rise toward the 24 volt rail and that isn't happening.
If the input FET was conducting then you would have more voltage across R9 and so the lower FET would be conducting but with the current limited by the upper FET and Q3. Your readings all show the power FET's are non conducting however.
(All this assumes there is only one problem and not multiple issues)
So I still think the issue is in or around Q3.
If C3 was fitted the wrong way around then the leakage might be enough to give similar results to what you are measuring but that would be very much on a knife edge and I would expect your measured results to be variable and not so consistent. Worth checking though.
I will substitute a BC550 for the ZTX and see what happens. If the screen print is incorrect would it hurt to reverse the ZTX and see if that is the problem. Perhaps before I do any of the above I should trace out the circuit as on the board and see if it corresponds with the original. Shame they don't supply a schematic. I will also check C3.
IT should be super easy to prove just by checking and looking where the pins go 🙂
The collector of Q3 goes to R7 while the emitter goes to the drain of Q1 (the lower FET). The base goes to R8. As quick to check as to read this 😉
If it does prove to be fitted incorrectly then it should be fine if refitted correctly.
Test results : BAD BOARD Q3 ZTX continuity
C shows continuity with one leg of R7 (10k)
E Continuity with D of Q1.
B shows continuity with one leg of R8 (1k)
If E should connect to D of Q1 then I am even more confused.
The IFRP240 pinout is G D S
BAD BOARD
Q1 E continuity with D
Q2 E continuity with S
GOOD BOARD
Q1 E continuity with S (nothing with D)
Q2 E continuity with D & S
Slow down there...
Remember the boards are mirror images, what is Q1 on one is Q2 on the other.... The Good board will conform.
Those boards and a number of variations have been discussed here and other sites and the screen print is not a problem.
And the schematic is the same as posted in the build guide step 1, no difference. You just need to account for the component location changes. https://guides.diyaudio.com/Guide/Amp+Camp+Amp+V1.6+Build+Guide/5#s80
The transistor junctions are shown in this step: https://guides.diyaudio.com/Guide/Amp+Camp+Amp+V1.6+Build+Guide/5#s145
Sorry, just trying to stop a spiral... Alan
That is correct.
That too is correct.
Remember the boards are mirror images, what is Q1 on one is Q2 on the other.... The Good board will conform.
Those boards and a number of variations have been discussed here and other sites and the screen print is not a problem.
And the schematic is the same as posted in the build guide step 1, no difference. You just need to account for the component location changes. https://guides.diyaudio.com/Guide/Amp+Camp+Amp+V1.6+Build+Guide/5#s80
The transistor junctions are shown in this step: https://guides.diyaudio.com/Guide/Amp+Camp+Amp+V1.6+Build+Guide/5#s145
Sorry, just trying to stop a spiral... Alan
😀 That's fine Alan I know everyone helping me means well. I have built a lot of stuff over the years and the number of problems have been very few thankfully so I am a little out of my comfort zone, but always willing to learn and be educated. I will digest your post. Rob.
Are we sure on that? That would be very bad practice to have boards with part references swapped around.
It is easy to check because the FET with 24 volts (the supply) on the middle pin should be Q2 and the the FET with the middle pin going to the high wattage resistors on the board should be Q1
I think I have caused more problems mounting the good board upside down 😡
Doing the voltage and continuity checks as above :-
GOOD BOARD Q2 is L and Q1 R if the board were repositioned as in the bad board.
BAD BOARD Q1 is L and Q2 R
So the boards are handed.
Doing the voltage and continuity checks as above :-
GOOD BOARD Q2 is L and Q1 R if the board were repositioned as in the bad board.
BAD BOARD Q1 is L and Q2 R
So the boards are handed.