Aleph-X builder's thread.

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R19/R29 (input to ground) = 10k - this seems to be a decade higher than input resistor in most other designs... Why is it 10k here?

it's actually 22.1KOhm :)

I forgot to include in above, when I moved to Graeme's CSS for the input differential, I had to change VR2 from a 200R to a 1K pot in order to adjust absolute offset to 0v. The 200R pot didn't give me enough room to bring offset down to zero.

Using Graeme's schematic for labels, I have the following:

R18/R28 (only resistor between input signal and jfets) = 10k
R19/R29 (input to ground) = 10k - this seems to be a decade higher than input resistor in most other designs... Why is it 10k here?
R16/R30 (feedback) = 100k
R47/R47 (McMillan) = 10k
R23/R25 (connects ZTX550 collector to -Rail) = 392R
 
I forgot to include in above, when I moved to Graeme's CSS for the input differential, I had to change VR2 from a 200R to a 1K pot in order to adjust absolute offset to 0v. The 200R pot didn't give me enough room to bring offset down to zero.

Hi Eric,

I'm afraid something is wrong here. The absolute offset is set by the voltage over the drain resistors (392R), This is defined by the bias through the input diff pair. The bias is defined by the current source.

Since you didn't change the drain resistors, the bias should stay the same so the current source setting also should stay the same. If it is not your input arrangement must have influenced the current source. Are you sure there's enough voltage drop over it to work properly?

William
 
William: I didn't check this. I presume the proper place to measure voltage drop is between the source pin of Q6 and the positive rail?

In the Aleph-J circuit, Nelson specifies this as 8.3v, but in the Aleph 2 and 4 amps, it is specified as 4-5v with a 9v drop across the zener. Should these measures in my JFET amps match my amps with the 9610 front end?

Zen: Thanks for the suggestion. I presume you mean one R for each JFET? This means total disassembly again. I did notice a few things when playing around with relative offset. If I put my finger on top of the 550s one the "Q5 side" of the circuit, the offset goes positive quickly. If I put my finger on top of the 550s on the "Q7 side" of the circuit, the offset goes negative quickly. If I pinch all 4 in a row together with my fingers, offset approaches zero, so I'm wondering if the outer two 550's in my lineup of 4 are dominating the relative offset swing. I was thinking of trying another arrangement with better thermal coupling of the 550's.

I do notice that when rel offset is low (~14mV on powerup) the hum/hiss (tweeter and midrange drivers) from the speaker is very, very quiet. After everything warms up (and offset is now ~80mv), there is more pronounced hum/hiss from the speaker that matches my other amps. Don't know if this is linked to overall thermal state, or just relative offset (or if these two are actually more identical that I'm thinking).
 
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Hi Eric,

yes. This voltage is defined by the gate voltage and Vgs of the 9610. These should have stayed the same but didn't. If you had to raise VR2 to get it right then less current is coming from the current source.

Since absolute offset is zero the current at the drain resistors must be the same as before. So where is the extra current coming from?

I had a look at the schematic and the only thing that could be is that the base current of the ZTX550's is added to the bias current. I would have thought this to be very small but maybe it isn't. MAybe the data sheet will clear this.

William
 
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no way - for ZTX base current ;it's too small and it will influence current through 390R only in case that ZTX is ooked , when that isn't base current anymore , but ooked current :rofl:

fact is that output mosfets are biased , so current through 390R resistors is adequate
sole question is how Eric came to that current ?

however , measuring voltage across zenner (+1n400x ?) or - written in other way - from gate of CCS mosfet to positive PSU leg ......... and exact voltage between mosfet source and positive PSU ....... and exact resistance between mosfet source and positive PSU .......... will tell us more about proper operation of CCS
 
I've been a bit tied up with work and weekend travel lately, so my progress has been a bit stalled. Thanks to Zen and William for suggesting measurements on the CCS - I will measure this soon and post the results.

I've been thinking about the tempco of the new front end - particularly the impact of the 550s on the relative offset drift that I have as the amp warms up and I touch them. It then occurred to me that these are the ONLY parts in my amp that have not been matched across sides. Duh...

So, how do I measure the ZTX550s to attempt to better match them? Can I just do this the same way I did with my 2SJ74's?

Perhaps this will solve my wandering offset difficulties. I've been trying to come up with a simple/elegant arrangement to thermally couple them, but this just results in messy wiring.
 
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no need for that , actually

they can influence Vds of Jfets just a little , and that difference can't influence Jfet's current that much

however - matching them just on Hfe function of your DVM is sufficient

everything is going in circle LTP CCS tempco-Jfet tempco-output mosfets tempco ..... that middle one being most influental
 
one step forward, two steps back...

OK, so things at work have slowed down a bit and I have some time to get back to my amps. The jFet input was working relatively well, but I wanted to follow up on Zen's request for voltage measurements across the CSS to see just what was going on.

The first thing that I did was to back the bias current down from 9A to 8A. This seemed to impact my Rel DC offset, bringing it down to about ~10mV or so, which made me really happy (it had been ~125mV). I also noticed the ZTX devices were running a bit warm - I measured them at about 50c which seemed rather high to me...

Then I started measuring across the back to back zeners in the CSS. For a brief moment, I saw about 9.2v on my meter, then my probe slipped and I ended up shorting the leg of the zener (+rail) to the leg of R45. A nice little spark resulted, taking out both zeners as well as the 9610 in the CSS. The output to ground resistors (5 x 390R, 5w bundle) got so hot, one of them de-soldered itself from the rest... schematic here :eek: :( :RIP:

So, I replaced the Zeners and the 9610. I also used this as an opportunity to rebuild the LTP according to Zen's advice. I remeasured the 2SJ74's to make sure they still matched. I added 10R to the source leg of each of the 74's and cascoded them with a matched (hfe on my meter) set of ZTX550's.

But I missed something. I am still getting full rail voltage - from BOTH rails - across my speaker terminals now.

Any ideas on what to look for now? :eek:
 
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....

But I missed something. I am still getting full rail voltage - from BOTH rails - across my speaker terminals now.

Any ideas on what to look for now? :eek:

full rail positive or negative ?

also - give us voltages (ref. that pdf from your post ) :

- across R23 &R25
- source of input Jfets ref. GND
- across source resistors of output mosfets , for each quadrant separately
 
OK, i made some measurements. Voltage across:

R23 = 14.0v
R25 = 0.0v

Source resistors on:
Q10 = 0.02v
Q11 = 0.0v
Q2 = 0.29v
Q1= 0.25v

JFET source to ground
R25 side = -9.2v
R23 side = -9.1v

Voltages on speaker terminals:
Negative post to ground = 23.6v
Positive post to ground = 20.2v
Across speaker terminals = 43.8v

Power supply rails = +/- 24v
 
Thanks, Zen. Sorry that i overlooked the polarity of dc offset. Speaker terminal offset = +43.8v

JFET Source / Gate / Drain voltages ref to GND
R25 side: -9.2v / -10.0v / -9.2v
R23 side: -9.1v / -2.1v / -2.8v

CCS 9610 voltages ref to GND
Source = +18.2v Gate =+14.2v Drain = -9.11v

Voltages across:
R45 = 14.3v
R49 = 5.75v
R56 = 2.8v

ZTX550 ref to GND
Drain = -9.1v on R25 side and -2.8v on R23 side
Base = -0.8v pins tied together for all 4 ZTX devices
Collector = -10v on R25 side and -24.2v on R23 side
 
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it seems one of input LTP side is problematic

recheck everything , I can't find any sane relation between your values , especially ZTX

there need to be one voltage for all bases , emiters need to be 0V65 more positive , while colectors need to be at proper voltage for opening output mosfets ( 4 to 5 V positive ref. to neg rail)

when I said - polarity of output offset - I meant each output ref. gnd

when one write "ref. something " that always mean black probe parked on that "something"

so , when you write speaker terminal offset +xxx , I dunno where you parked black probe of your DVM , and I really don't care , because our goal is that speaker outputs are near ground potential , but they can't be any sort of reference
 
Zen, you are right again! Only after inspection with a magnifying glass did I find a tiny solder bridge across two pins on the input differential. Removing it has worked wonders for my amp!

More evidence to my belief : 99% of the problems one faces are user error....

Bias and offset are now behaving properly.