For these IPS pcbs, I default to 50 mil (1.27m) and usually fatten to >=75mil (1.9mm) going into pads, since the software I use does not have auto tear-dropping.
Very seldom do I have to go below 25mil. In the pcb design world these are very low tech designs.
I think I know the answer already
Very seldom do I have to go below 25mil. In the pcb design world these are very low tech designs.
I wonder about that, so am I to take that further and speculate that the TO-92 lead frame wire is too small, resulting in measurable thd, I'll have to ask the experts, Onsemi/Toshiba what they think about that
I think I know the answer already
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Nobody said 1mm traces were the gold standard, but that's what Pete used for his layout. Not sure what servos have to do with trace widths?
For these IPS pcbs, I default to 50 mil (1.27m) and usually fatten to >=75mil (1.9mm) going into pads, since the software I use does not have auto tear-dropping.
Very seldom do I have to go below 25mil. In the pcb design world these are very low tech designs.
I wonder about that, so am I to take that further and speculate that the TO-92 lead frame wire is too small, resulting in measurable thd, I'll have to ask the experts, Onsemi/Toshiba what they think about that
It sounds like you do layouts with what the older designers were suggesting. Stuartmp was talking about goin less than .015". Good for digital and SMT, but not so much for through hole analog.
If the rumors are true about the dollars worth of test gear Marsh has we can likely trust his findings.
15 mil on a pcb like this, I have to wonder why it is needed, sneaking signals between pads on 50 mil centers I assume.
You are safe to use 5/5 mil track/space with modern day pcb mfg, been like that since the 90's, before which you paid a premium.
All I know is folks equating thd with Cu trace width for small signals is rubbish imo, but everyone can toot their own horn and have their followers, it's a big world.
I laughed at John Curl promoting teflon substrate pcb's for audio. Whatever floats your boat John.
I'd take Valery's input as I respect his judgement over many others.
You are safe to use 5/5 mil track/space with modern day pcb mfg, been like that since the 90's, before which you paid a premium.
All I know is folks equating thd with Cu trace width for small signals is rubbish imo, but everyone can toot their own horn and have their followers, it's a big world.
I laughed at John Curl promoting teflon substrate pcb's for audio. Whatever floats your boat John.
I'd take Valery's input as I respect his judgement over many others.
Sometimes it is more than you may think it is.
Because the marketing dept is driving the bus
We are working on a modern day audio power amp in this thread and discussing layout techniques.
I recently was working with Bob Cordell on the BC-1 amp as shown in the book. I have designed a few boards in my life, still, I do not think (as much as i should) like an electron or a magnetic field, so my designs can be improved to some degree by someone who understands these things better than I do. I am still learning and I am retired from full time pcb design.
So I could shoot some holes in this layout (and I haven't even seen the fab files yet) but I choose not too because it is fine, been done before, has lots of review, which is great, considering the ecad tool it will work fine, if it is correct by design
Gee OS, sorry for being candid, I am working on my manners, get a handle on a synchronized schematic and layout netlist. To me is like pushing the car vs driving it, save your mind for better things than keeping track of a synchronized layout. Bob asked me the same thing when we were starting out, the tools job is to keep the two in synch ( forward and back annotation) or we are in BIG trouble boss.
Back to your regular program ...
Because the marketing dept is driving the bus
We are working on a modern day audio power amp in this thread and discussing layout techniques.
I recently was working with Bob Cordell on the BC-1 amp as shown in the book. I have designed a few boards in my life, still, I do not think (as much as i should) like an electron or a magnetic field, so my designs can be improved to some degree by someone who understands these things better than I do. I am still learning and I am retired from full time pcb design.
So I could shoot some holes in this layout (and I haven't even seen the fab files yet) but I choose not too because it is fine, been done before, has lots of review, which is great, considering the ecad tool
it will work fine, if it is correct by design Gee OS, sorry for being candid, I am working on my manners, get a handle on a synchronized schematic and layout netlist. To me is like pushing the car vs driving it, save your mind for better things than keeping track of a synchronized layout. Bob asked me the same thing when we were starting out, the tools job is to keep the two in synch ( forward and back annotation) or we are in BIG trouble boss.
Back to your regular program ...
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If the trace width came from JC I'd take it with a grain of salt and move on. I can't remember who all mentioned it, but I could see a possible reason for it. Trace widths are calculated to an allowable temperature rise in the copper. Temperature rise = a difference in resistance of the tracks. Possibly the source?
The reason for the trace width change discussion here was for greater creepage distances. Stuartmp uses uncoated board specs for creepage. I use the same. I'm not going to trust some cheap "China's finest" solder mask as an insulator. There's no voltage ratings listed anywhere.
The reason for the trace width change discussion here was for greater creepage distances. Stuartmp uses uncoated board specs for creepage. I use the same. I'm not going to trust some cheap "China's finest" solder mask as an insulator. There's no voltage ratings listed anywhere.
I just suggested 0.4mm as a trace width. I didn't say it had to be this but when you look at the IPS is has less the 10mA going through it. A 0.1mm trace supports 350mA more than enough and a 0.4mm supports 1.28A surly this is more than enough to keep THD low.
I'd also like to know how he came to that conclusion. How many trace widths did he test. Did he unsolder all his parts from one board once he finished testing and install them in the next. I don't think so. How would you know with 100% certainty that it was the trace width and not a component.
Anyways it was just a suggestion. Lets wait for OS its his project. I was just trying to offer one possible solution.
I'd also like to know how he came to that conclusion. How many trace widths did he test. Did he unsolder all his parts from one board once he finished testing and install them in the next. I don't think so. How would you know with 100% certainty that it was the trace width and not a component.
Anyways it was just a suggestion. Lets wait for OS its his project. I was just trying to offer one possible solution.
I have nothing constructive to add to the discussion on how to build this PCB "best", but I do have a question.
Maybe I have been mis-seeing this when I have seen it, but why do some amplifier builds seem to have solder "built" up on some of the traces?
Sorry if this is off topic to this thread.
Maybe I have been mis-seeing this when I have seen it, but why do some amplifier builds seem to have solder "built" up on some of the traces?
Sorry if this is off topic to this thread.
You mean the line of solder built up in middle of traces , to "grift" a little
more current rating from that trace. Lazy designers.
OS
Not all , 470p is 7.9mm ... harder to find 500V 470p is 5.9mm.
68,100,56pF are 5.9 .. generally.
OS
Big electro's 5mm ,small electro's 2.5mm , .1uF's - 5mm.
Silver mica's 470p=5.9/7.9 most others 5.9. Smaller silver's ,,even
at 3.9mm ... can easily be formed to a 5+mm pitch.
OS
Saturation , needed added components to squeeze just a few PPM.
Another example of an early Badger/wolverine design addition was
TMC feedback. Badger gets 20ppm (EF2). Original Wolverine nearly
matched best case Badger TMC wihout any(EF3). This Wolverine , I added
TMC .... 15-20ppm is now even sub PPM under 10K.
Worthy of extra components.
As I said , if someone wants to refine the base design further ... un-jumper
DIP 1. POP in yer' better IPS. Neat ... HUH.
OS
Hi OS,Bend that VAS input trace further from Ground (G2).
2 bends - finished.
57V difference (VAS IN vs. G2) , best to
be on the safe side of the "creep".
PS - JW's hint on R20 is valid. Might also want to re-swap R19/20.
I originally swapped them , me bad...
OS
Thanks for the update.
Have you seen my post #535, #527 & #537 ?