The Well Tempered Master Clock - Building a low phase noise/jitter crystal oscillator

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Very rough sketch ... 6 refers to a 6mhz clock oscillator, 24 to a 24 MHz clock oscillator. The two clicks could lock and produce an error signal which could modulate the 24 MHz clock

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Hi & thank you for your response....
....looking very quickly at it, I do not see how this setup can reduce close-in PN.
The PN characteristics of this schematics will be defined by the 24 MHz oscillator in your picture, just as in a Locked Loop.

If your goal is to reduce close-in PN, or at least its effects, there are other things you can do:

1. In the Clapps schematics, take the signal current from the xtal.
2. Run the xtal close to max DL.
3. Use multiple coupled oscillators (2 or more)
4. Use local feedback
5. Be carefull with your choice of Post amps.

Follwing these steps, you will be able to massively reduce PN of you 24 MHz clock system.

Cheers...
 
...Here is a more detailed discussion than you will find elsewhere on the subject:
Phase-Locking ULNs for Optimum Performance |

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Interesting article, though very different from jbordens sketch...

Difficult to get right, easier to screw up, expensive components...

My recommendations:
Stick with 1 to 5 above, as they are cheap and very easily implemented.

Good luck
 
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@Andrea: Just a follow-up on the delivery date for the crystals .. I may have an update but have you written somewhere in the thread when the crystals are expected to arrive in Italy? To my memory I read earlier that it was expected to be around the end of April ...

Cheers,

Jesper

Hi Jesper,

confirmed delivery date is May 17th, so I believe 3-4 days to arrive in Italy.
 
Andrea,

a question about the TWTMC... with regard to the power supply requirements.
How much current does the clock need (5Volts operating voltage) And to which extend do I need to suppress PSU noise and ripple?

BTW, I looked for them in the thread but was unable to find them.....
 
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Andrea,

a question about the TWTMC... with regard to the power supply requirements.
How much current does the clock need (5Volts operating voltage) And to which extend do I need to suppress PSU noise and ripple?

BTW, I looked for them in the thread but was unable to find them.....

About the power supply:

- the TWTMC-C (Colpitts-Clapp oscillator) needs 2 rails, +15V around 20mA for the oscillator and +5V (or +3V3) 10-15mA for the squarer
- the TWTMC-D (Driscoll oscillator) needs 2 rails, +6V 10 to 25mA (depending on the Crystal ESR) for the oscillator and +5V (or +3V3) 10-15mA for the squarer

In any case you should use a clean power supply, since PSU affetcs the close in phase noise performance.
 
Thanks Andrea!

How accurate must the 15Volts be? Between 14 and 15.5Volts?

Noise on each power line less than 1mVtt ??

14 to 15.5 should be fine. About the noise, the better you can find. Demian's PSU I have embedded in the daughter board TWTMC-D&D has very low noise. You can use also a very clean shunt regulator, since the current is almost constant.
 
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Hi again ... I have a question possibly for Herbert ... I have been reading a bit in your "Reproducible Low Noise Oscillators" and notice your section on magnetic materials in relation to inductor selection for the oscillator. To this end I've been looking for a 2.7 uH air core inductor and I've found this one from Digikey:

Electronic Components and Parts Search | DigiKey Electronics

Do you think it can be used for the oscillator (it has a 3.2 ohm resistance)?

Thanks for any feedback & cheers,

Jesper
 
Crystals are on the way.

Following individual measured data of AT-Cut type.
 

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Well, I don't know the significance of the various data you provide but I'm pleased to hear that the crystals are on the way.

Thanks Andrea once more for the work & effort you put in this ...

Cheers ;-)

Jesper

Hi Jesper,

data provided are the individual measurement of each crystal made by Laptech, as I requested when I placed the order.

You can think a crystal as a series R-L-C filter with a capacitance in parallel. As you can see in the attached data, eg 6.144MHz, RR is the ESR of the crystal (R of the RLC filter), C1 is the motional capacitance (C of the RLC filter) and C0 is the capacitance of the crystal's terminals (in parrallel to the RLC filter).
Q is the Quality factor of the modelled RLC filter, and characterizes the resonator's bandwidth relative to its center frequency. The higher the Q the narrower the bandwidth, the better the crystal. Higher Q means a lower rate of energy loss relative to the stored energy of the resonator.

Typically, the higher the Q of the resonator, the lower the phase noise of the oscillator. The goal is to get highest loaded Q as possible, starting from an high Q resonator. The Driscoll and the Butler circuits provide high loaded Q, since the resonator sees a very low impedance (crystal in the emitter circuit).
 
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