The simplistic Salas low voltage shunt regulator

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How can we wired the JFET: d+g one leg and s the other leg or etc...? wich JFET: sk117, sk170, etc?
Idss is measured with G+S and D as input.

This operates in a circuit as well and gives a good CCS.

One would not normally connect D+G and use S as output.
Except that jFETs are reputedly virtually symetrical. One can swap D & S and get virtually the same performance, particularly with those intended for RF duty.
But this would be D+G and S as input, not output.
 
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After changing R1 for 2R (I don't have 2R2) and the SK117GR for R6, now Vout 5.158VDC current 316mA (0.631V across 2R). Some pics:

1st left connected the FF & isolator both powered R-D
2nd BiB only powering Amanero
3h connected only FF without isolator powered R-D
 

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