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Reference DAC Module - Discrete R-2R Sign Magnitude 24 bit 384 KHz

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#921
smanz said:
Hi Søren.

My USB adapter have reclock and isolation on I2S signals.

Is possible bypass onboard isolator chip of dam1021?. How?

Thanks & Regards

Antonio
Click to expand...

You can't bypass the onboard isolator when using I2S, double bypass won't hurt, but there is also no advantage to it, it's just a waste of parts....

The onboard isolators just also need power and gnd connected, you can take that from the regular nonisolated GND and +3.3V.
 
#922
Half way. Not maybe last destination for boards. Anamero USB. Still some way to go...

//
 

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#929
Quote:
Originally Posted by spzzzzkt View Post
For Amanero rev F. -> DAM1021

FSCLK -> LRCK (Frame sync = Left/Right)
CLK -> BCLK (Clock = Bit Clock)
DATA -> DATA
+3.3V output -> +3.3V
i have Sonore usb - i2s converter(SONORE USB Interface).
it has 4 outputs only
Bit Clock=Bit Clock DSD
Word Clock=Data L DSD
SData=Data R DSD
Master Clock=Master Clock

How it looks like the Sonore usb - i2s -> DAM1021 connection ?


Can someone help? 🙂
 
#931
spzzzzkt said:
Hi Eldam,

I'd highly recommend reading (or rereading) the first three parts of the TNT Audio digital interfaces articles - starting here:
Digital Interfaces - An Introduction - Part 1.1 [English]

It is a pretty decent intro to the issues and the history. While it won't directly answer your questions it will help you understand what the issues are, and give you a framework which will help you make sense of all the information you are digging up. Most of what you are asking requires an basic understanding of the causes of jitter and the problems that people are attempting to solve with Async USB, Isolators, Fifos, clocks etc.

I'd make the observation that "Bit perfection" and "data corruption" are non-issues in working data interfaces. If these are a problem there is a fault in some part of the system like damaged cables or connectors etc.

cheers
Paul
Click to expand...

Hi, Thanks. I think I need it. Especially how jitter occurs after the device has recieved the tcp/ip packets and how a jitered signal after can be reclocked? Is it all about jitter ?

So, reading into the lines you answer I would have the same result playing a 16/44 via the spidf 24/44 or via the I2S 32/384 !

Ok !
 
#932
Only power unit left to do. 45 min? Skipped the ribbon cable as it was too hard for me today to sort out what is what :-/

Good ol' DIN for power 😉 gives me a varm fuzzy feeling.

//

"Concentrate on assembly please, typing takes time..." hehe 🙂
 

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#937
TNT said:
Only power unit left to do. 45 min? Skipped the ribbon cable as it was too hard for me today to sort out what is what :-/

Good ol' DIN for power 😉 gives me a varm fuzzy feeling.

//

"Concentrate on assembly please, typing takes time..." hehe 🙂
Click to expand...

And, And....And do you like what you hear ?

No ? Could it be the damned tweasted wire between the aes plug and the pcb ? Not blessed by virgins during a full moon 😀 ! Phase Saints, Noise God.... jitter prophet (Nah, there's a fifo !) !

Not kidding, do you like it (sent pm if not !)😱
 
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