Thanks guys!
Ostripper, am sorry, but if you can see distortions on a DSO screen, then there must be smthing very wrong. A common 8bit DSO, even with FFT, won't make visible anything under 0.1% distortions. Have you compared TMC with Miller and two pole compensation?
Dadod, YMMV, no debate about the good sound, but arguments like "sweet sounding" can not replace measurements. You don't need TMC to get a sweet sounding amplifier, Miller will do.
Have myself read the Baxandall's paper and I think it is as close to TMC as the first transistor in the Bell Labs to a BC550. Not really close, but still a transistor.
book, ThermaTrak
Hi Bob,
Would you have look at this post, please. http://www.diyaudio.com/forums/soli...-thermal-trak-transistors-16.html#post2388954
Cheers,
E
Hi Bob,
Would you have look at this post, please. http://www.diyaudio.com/forums/soli...-thermal-trak-transistors-16.html#post2388954
Cheers,
E
I have to wonder if 68 ohms was a typo and should have been 680 ohms .... in fact Baxandall's suggestion to use a 1K pot (page 35) for experimentation strongly supports this theory. I would expect a 100 ohm pot if the nominal was 68 ohms.
DSO ?? CRO ! (analog) ... looking at the OP , you can see the Xover "glitch" .. easily.
I stated that TMC will try to correct this "glitch" , not eliminate.. but correct. To compare the two is a easy as a switch on the "R" , switching between the standard 2 caps in series (miller) and TMC.I can see the "glitch" , but without an AP I don't know what harmonics that is producing. NO , a CRO can not replace an AP , but it will give insight into the process involved here. Your ears can actually "fine tune" the process , 390 - 680R (I have the 1K trimmer) actually is the sonic "sweet spot" , at least for the 100p/270-390p capacitor combo. I am past simulations and theory.
OS
typo? 68 or 680 Ohms?
Oh really? Perhaps you should also read the next paragraph of Baxandall's analysis:
With the pot, at maximum, or open circuit, substantial crossover glitches will probably be seen......
Obvious, No one would consider 1 kOHm WRT 680 Ohms an 'open circuit'. Unless, of course, Baxandall meant 10k. Another typo as well? Very unlikely.
Oh really? Perhaps you should also read the next paragraph of Baxandall's analysis:
With the pot, at maximum, or open circuit, substantial crossover glitches will probably be seen......
Obvious, No one would consider 1 kOHm WRT 680 Ohms an 'open circuit'. Unless, of course, Baxandall meant 10k. Another typo as well? Very unlikely.
DSO ?? CRO ! (analog) ... looking at the OP , you can see the Xover "glitch" .. easily.
I can see the "glitch" , but without an AP I don't know what harmonics that is producing. NO , a CRO can not replace an AP , but it will give insight into the process involved here. Your ears can actually "fine tune" the process , 390 - 680R (I have the 1K trimmer) actually is the sonic "sweet spot" , at least for the 100p/270-390p capacitor combo. I am past simulations and theory.
OS
Hi ostripper, not sure I follow, but I never saw, in a correctly biased output stage, crossover glitches (if this is what you mean) on a CRO. Obviously, negative feedback will hide severely (and visible) under biased crossover glitches but that's barely a metric for TMC vs. Miller. If Miller compensation was still showing the output stage crossover glitches, then the entire amplifier was shaky to start with. Anyways, good luck!
Hi Edmond,
I looked at the post and responded as here below. Thanks for bringing my attention to it.
Hi Edmond,
I'm sorry I'm late getting back to this post - I just lost track of this thread.
You are right about thermal attenuation within the ThermalTrak devices between the transistor junction and the tracking diode. This is certainly non-ideal, but the ThermalTrak arrangement is still far superior to the conventional arrangement, which suffers even more thermal attenuationa and far more thermal delay.
In general, some experimentation is needed in setting up the optimum compensation for a ThermalTrak amplifier. Some form of electrical multiplication usually has to take place in the Vbe multiplier associated with the ThermalTrak devices. Indeed, some multiplication is often needed anyway because the temperature coefficient of the ThermalTrak diodes is not quite the same as that of the BJT. So the needed amount of multiplication is all wrapped together the best we can.
In many cases I'll use two Vbe multipliers, one working with and incorporating the ThermalTrak tracking diodes and the other providing bias spreading for the remaining devices of the output Triple. That way, the amount of multiplication allocated to each process can be set somewhat independently. The transistor of the second Vbe multiplier usually wants to track the temperature of the pre-driver and driver transistors. Indeed, if the driver transistors happen to be mounted on the heat sink, then the transistor of the second Vbe multiplier may also be mounted on the heatsink.
It was a two Vbe multiplier arrangement like this that I used for the test amplifier whose bias behavior is shown in Figure 14.23 in the book. In that case, the second Vbe multiplier along with the pre-drivers and drivers were mounted on an isothermal bar/heatsink on the circuit board.
Cheers,
Bob
Thanks Doug, I have to get the journal and take a look.
Otherwise, it seems like very little experimental work was done here, in analyzing and comparing TMC to Miller and two pole compensation. For some theoretical reasons (related to Bode integrals, othewise said, "there's only so much loop gain you can handle and use") my guts are telling me that TMC would not provide more distortion reduction (and stability margins) than the two pole compensation method.
A very close relative of TMC (it's not encompassing the output stage, but another gain stage) can be found in ch. 5 of:
-------------Frequency Compensation Techniques for Low-Power Operational Amplifiers Rudy G.H. Eschauzier Johan H. HuijsingSpringer; 1 edition (March 31, 1995) -------------
Oh really? Perhaps you should also read the next paragraph of Baxandall's analysis:
With the pot, at maximum, or open circuit, substantial crossover glitches will probably be seen......
Obvious, No one would consider 1 kOHm WRT 680 Ohms an 'open circuit'. Unless, of course, Baxandall meant 10k. Another typo as well? Very unlikely.
Do you really think he meant that at maximum is like an open circuit - it certainly is not so perhaps he meant actually opening the circuit if necessary since he also says "glitches will probably be seen ..." seems he's not sure if max on the pot or open circuit will be required to see the glitches. This further suggests that his intention was 680 ohms. Actually, based on his functional description it is clear that his intent was TMC and therefore no matter what his quick suggestion was for that resistor his real intent was for it to work as TMC.
It seems Edmond, that you strive to take a slant on his writeup that suggests that he got it wrong - I don't know how anyone could think that he got it wrong based on the rest of his completely clear writeup. The only reason would be to boost one's own ego.
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I just want to add my voice to the chorus of praise for Bob's book -- I got my copy yesterday, and it is the best work on the subject I've seen -- ever. Thanks, Bob for the hard work, great insights, and clear presentation. It is a joy. I haven't been so pleased with a tech book since my first copy of the GE Transistor Manual -- and that's a really long time.
Yes it is excellent. I'm reading it at the moment.
I have found a typo on page 87 (Miller Compensation). In the example given , the reactance of C1 (33pf) at 20KHz is denoted (twice) as 24,000 ohms - instead of 240,000. However, it doesn't affect the end result of the linear gain calculation (500).
Apologies if this has already been pointed out.
I have found a typo on page 87 (Miller Compensation). In the example given , the reactance of C1 (33pf) at 20KHz is denoted (twice) as 24,000 ohms - instead of 240,000. However, it doesn't affect the end result of the linear gain calculation (500).
Apologies if this has already been pointed out.
TO Bob Cordell
I am copying my post in the TT thread hereunder:
I have read your suggestion of using the left over TT diodes to detect the temp of the junction and protect the transistor before reaching let say 150°C. If we have such a detection coupled with a maximum current detector we are safe with respect to short circuit protetcion.
The question remaining is secondary breakdown. Do you believe that monitoring the power max temp is safe enough. Secondary breakdown will happen with some reactive loads but it has been shown elsewhere that derating for temp during secondary breakdown should be less stringeant than the derating of power dissipation because the effect of increase of emitter resistance with temperature. In other words, with increase in temperature, the normal power limit takes over the secondary breakdown limit for higher Vce than at lower temperature. If you couple this with the 10 ms SOA limit, is it not reasonnable to say that monitoring the 150°C crossing is totally safe for normall ( less than 45° phase) loads.
Then a totally non intrusive SOA protection device can be designed.
Looking at the data sheet of NJL3281 the 10ms SOA limit is fully power dissipation with no 2° breakdown sign. Is this not a good argument to design a protection sollely based on T° of junction ( for audio program). Unfortunatelly, there is no derating curves with temp but as said above, higher temperatures will shift the full limit to the right but the start of 2° breakdown will be relatively shift to the left in the higher temp limiting curve.
The thermal attenuation between Transistor and diode must be taked into account on the safe side by estimating the transistor 150 °C beeing a lower temperature in the diode. Is your thermal model of TT good enough for this exercice.
Thanks
JPV
I am copying my post in the TT thread hereunder:
I have read your suggestion of using the left over TT diodes to detect the temp of the junction and protect the transistor before reaching let say 150°C. If we have such a detection coupled with a maximum current detector we are safe with respect to short circuit protetcion.
The question remaining is secondary breakdown. Do you believe that monitoring the power max temp is safe enough. Secondary breakdown will happen with some reactive loads but it has been shown elsewhere that derating for temp during secondary breakdown should be less stringeant than the derating of power dissipation because the effect of increase of emitter resistance with temperature. In other words, with increase in temperature, the normal power limit takes over the secondary breakdown limit for higher Vce than at lower temperature. If you couple this with the 10 ms SOA limit, is it not reasonnable to say that monitoring the 150°C crossing is totally safe for normall ( less than 45° phase) loads.
Then a totally non intrusive SOA protection device can be designed.
Looking at the data sheet of NJL3281 the 10ms SOA limit is fully power dissipation with no 2° breakdown sign. Is this not a good argument to design a protection sollely based on T° of junction ( for audio program). Unfortunatelly, there is no derating curves with temp but as said above, higher temperatures will shift the full limit to the right but the start of 2° breakdown will be relatively shift to the left in the higher temp limiting curve.
The thermal attenuation between Transistor and diode must be taked into account on the safe side by estimating the transistor 150 °C beeing a lower temperature in the diode. Is your thermal model of TT good enough for this exercice.
Thanks
JPV
It states what it states, period.
If it was indeed 680 Ohms, then you will never get visible glitches if you increase the resistor by 50% (to 1k), and certainly not at a (pretty high!) transition frequency of 1 to 2MHz. Moreover, even 300kHz or so will do. Sorry, that alleged typo is nonsense.
I fully agree with that. That was his intent, at least.
Please, don't misunderstand me. I'm NOT striving to "take a slant on his writeup", instead, to reconstruct the history of TMC and to find an explanation why TMC didn't catch on much, much earlier. Added to this that, by then, D.S. wasn't impressed by the results, this gives enough ground to assume that Baxandall's version of TMC was NOT equivalent to its present form. That's what I (and a few others) are trying to make clear.
So What? Anything wrong with that? Everyone here is boosting his own ego, otherwise you wouldn't hear them at all.
Hi,
frequency compensation in whatever topology more or less degrades the performance. Stability is gained at the cost of linearity. Regardless the location of pole frequency and zero frequency points and regardless the damping ratio, an increase in distortion is the result so you wouldn't really want to "linearize" stable systems using any harmful frequency compensation technique.
frequency compensation in whatever topology more or less degrades the performance. Stability is gained at the cost of linearity. Regardless the location of pole frequency and zero frequency points and regardless the damping ratio, an increase in distortion is the result so you wouldn't really want to "linearize" stable systems using any harmful frequency compensation technique.
TMC is a compensation scheme that use the necessary dumped
frequency response to attain stability to linearize the output power stage.
Somewhat contradictory with your understanding of how it works..
I'm not sure whether you're talking in general or specifically about TMC. In case of the latter, TMC does exactly the opposite. It increases the loop gain, or more precisely, it 'frees' some loop gain (and further linearize the system), which stays 'hidden' and unused in case of ordinary Miller compensation.