If I put my notes here, I might be able to find them again later!
jFET phono stage | harmonic cancellation jujutsu
There are lots of phono stage circuits floating around based on two jFET amplifier stages and a passive RIAA network. I'm not sure who did what first, but there's the Boozehound, LePacific, and of course Salas versions.
Setting aside concerns about the ripple rejection**, today I'd just like to focus on the distortion and noise of the circuit itself. The passive RIAA stage is a large obstacle. It attenuates the signal substantially at all but treble frequencies, and it generally presents a large series impedance - both of which tends to increase circuit noise.
The jFET themselves meanwhile are a fine balance between low current, low noise operation with high distortion, or running at high current, high noise, with low distortion. Circuit gain must be paid for meanwhile with added distortion since the two stage design struggles to manage 40 dB.
After spending some time in LTSpice with this, I realized it was the proverbial rock and hard place scenario. You can get something back though, because both stages are inverting. If the signal is the same magnitude and the loading is constant, even harmonic distortion will cancel going through both stages. As the signal attenuation/loading of the RIAA filter varies with frequency, you can only set this up to work perfectly at one frequency, but if 1 kHz is chosen it should be fairly close over most of the midrange.
The result of an afternoon's experiment is shown below, along with the LTspice circuit. It only manages about 34 dB gain, but I found bypassing the sources of the jFET amplifiers added too much distortion. Buffering both stages with followers allows more freedom to set the RIAA filter impedance and output loads lower. In short, yes, the second harmonic appears to be lower in the output that at other points in the circuit, at or below the noise floor. While I'm skeptical that the total distortion can be reduced in this way, it's basically the same trick as a push-pull amplifier: by making the distortion symmetrical over both halves of the waveform only odd-order harmonics are permitted.
This is just a concept, not a finished circuit. Haven't given jFET selection or the power supply design any serious thought yet.
** power supply rejection for this kind of circuit is truly appalling, it is even positive below 1 kHz. You heard that correctly: The circuit actually amplifies power supply noise, with gains up to 26 dB. Good grief!
*** LTSpice file replaced with slightly revised version of the circuit, now called "Crystal P".
Setting aside concerns about the ripple rejection**, today I'd just like to focus on the distortion and noise of the circuit itself. The passive RIAA stage is a large obstacle. It attenuates the signal substantially at all but treble frequencies, and it generally presents a large series impedance - both of which tends to increase circuit noise.
The jFET themselves meanwhile are a fine balance between low current, low noise operation with high distortion, or running at high current, high noise, with low distortion. Circuit gain must be paid for meanwhile with added distortion since the two stage design struggles to manage 40 dB.
After spending some time in LTSpice with this, I realized it was the proverbial rock and hard place scenario. You can get something back though, because both stages are inverting. If the signal is the same magnitude and the loading is constant, even harmonic distortion will cancel going through both stages. As the signal attenuation/loading of the RIAA filter varies with frequency, you can only set this up to work perfectly at one frequency, but if 1 kHz is chosen it should be fairly close over most of the midrange.
The result of an afternoon's experiment is shown below, along with the LTspice circuit. It only manages about 34 dB gain, but I found bypassing the sources of the jFET amplifiers added too much distortion. Buffering both stages with followers allows more freedom to set the RIAA filter impedance and output loads lower. In short, yes, the second harmonic appears to be lower in the output that at other points in the circuit, at or below the noise floor. While I'm skeptical that the total distortion can be reduced in this way, it's basically the same trick as a push-pull amplifier: by making the distortion symmetrical over both halves of the waveform only odd-order harmonics are permitted.
This is just a concept, not a finished circuit. Haven't given jFET selection or the power supply design any serious thought yet.
** power supply rejection for this kind of circuit is truly appalling, it is even positive below 1 kHz. You heard that correctly: The circuit actually amplifies power supply noise, with gains up to 26 dB. Good grief!
*** LTSpice file replaced with slightly revised version of the circuit, now called "Crystal P".
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