Yes, if the intent is to use the inverter as a gain of ~10 inverting amplifier for the SPDIF digital signal with input Z of 75R, then the resistors should be as above.
(Why is the inverter needed? The feed from the isolator is not inverted. Does the isolator invert the sense of the signal? Maybe the inverter is yet another bug.)
This guy used the same schematic to feed a 9018K2M: http://www.diyaudio.com/forums/digital-line-level/260906-my-diy-es9018k2m-dac-2.html#post4061612
Assuming that the LMV7219 comparator schematic is validated and working, it looks like the 74HC1GU04 inverting-amp design may be faulty. Note that the comparator is non-inverting, while amp is inverting.
If true then we can just bypass the 74HC1GU04 and should work and this will just be the same as the input from the isolator which may prove why some users can get it work via this route. Does the LMV7219 supposed to get you more stable signal when long coax cable/noise is being used ?
Thanks
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It will most probably be a cleaner signal, but it will also contribute some jitter due to the internal hysteresis and delay of the comparator. It's possible that the internal PLLs and processing of the downstream ES9018 can correct some or all of this jitter, so this may not be an issue.
If ESS is using it in a reference design, it should be workable with minor tweaks.
A have a few observations/comments.
1. The logic levels in figure A of post #254 seem to be wrong. The low level seems to be around 1.6V. It should be below 0.4V. I wonder what is keeping the low level this high?
2. The logic levels in figure B (with the isolator) seem to be correct, around 0V and 3.3V for low- and high level respectively.
3. In post #211 I commented on the value of R1. I guess my comment was not complete. If R1 is changed to 75ohm it should be moved to the other side of C3. A better solution is probably to add a 75ohm resistor on the input, so from the input to ground.
4. The comparator-based design will probably also work. I haven't simulated or tested it, but it looks OK. I am not sure that it will be better than the simple inverter based design though.
By the way, the polarity of an SPDIF signal doesn't matter.
1. The logic levels in figure A of post #254 seem to be wrong. The low level seems to be around 1.6V. It should be below 0.4V. I wonder what is keeping the low level this high?
2. The logic levels in figure B (with the isolator) seem to be correct, around 0V and 3.3V for low- and high level respectively.
3. In post #211 I commented on the value of R1. I guess my comment was not complete. If R1 is changed to 75ohm it should be moved to the other side of C3. A better solution is probably to add a 75ohm resistor on the input, so from the input to ground.
4. The comparator-based design will probably also work. I haven't simulated or tested it, but it looks OK. I am not sure that it will be better than the simple inverter based design though.
By the way, the polarity of an SPDIF signal doesn't matter.
I have tried to find an answer about this as well, especially because the same usb to i2c convertor (http://www.diyaudio.com/forums/group-buys/237301-gb-thread-xmos-dsd-384-khz-32bit-usb.html , and i have 3 of them) works flawlessly with bufallo III ....
On the other hand I'm happy because I managed to replace the dead k2m chip. I recommend, at the beginning of the build, unsolder dac chip and reg8 and reg7, clean the pads and surroundings and solder back paying attention to the back of the chip - apply a thin film of solder to the chip and to the board. It's a little bit hard but manageable with a bit of patience. Pay attention to the board tracks as well because they have the bad tendency to lift off and break.
The last dac is still playing after aprox 12 hours.
later edit: bufallo i2s input does not have any voltage between gnd and data pins, k2m has aprox 3.5v (when signal is aplied the value changes - but as @JensH mentioned does not reach aprox 0v as seen in my previous post)
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@ Syklab
Regarding post #271: Yes, exactly like you have shown there.
The 100k resistor will in most cases avoid getting noise on the output with no input signal. It may not be necessary to have it. Unless there is some automatic activity detection in the SPDIF receiver (DAC in this case) or it generates noise in the audio output.
@androa76
The circuit in post #272 will not work. The output will probably be high all the time, because the input signal swing is only around 0.5V peak-peak. So not enough to give a high input signal, since the DC level at pin 2 of the inverter is less than 0.1V.
@cmiu007
Could there be a short circuit to another CMOS output? The signal levels look like a "bus contention", where the square wave signal is connected to an output, which is always high. With one output being high and another (the SPDIF signal) being low, the result will typically be a level halfway between the supply and ground. Which seems to be the case here.
Regarding post #271: Yes, exactly like you have shown there.
The 100k resistor will in most cases avoid getting noise on the output with no input signal. It may not be necessary to have it. Unless there is some automatic activity detection in the SPDIF receiver (DAC in this case) or it generates noise in the audio output.
@androa76
The circuit in post #272 will not work. The output will probably be high all the time, because the input signal swing is only around 0.5V peak-peak. So not enough to give a high input signal, since the DC level at pin 2 of the inverter is less than 0.1V.
@cmiu007
Could there be a short circuit to another CMOS output? The signal levels look like a "bus contention", where the square wave signal is connected to an output, which is always high. With one output being high and another (the SPDIF signal) being low, the result will typically be a level halfway between the supply and ground. Which seems to be the case here.
please be patient with me as i'm a beginner
according to the image it seems that if s2 is off and ic1 si not soldered, the signal from A goes to the chip only thru R10-R12, in which case no short circuit can appear, outside the dac chip itself. i will try to remove the ic1 and measure/test again.
An externally hosted image should be here but it was not working when we last tested it.
later edit: feeding the signal thru A with s2 off and ic1 soldered does not work, please see my other post
The problem seems to be the design around IC1 and S1. As far as I can see S1 can connect the output enable pin of IC1 to the supply. The problem is that the outputs of IC1 (ISO7230M) will be active when the enable pin is high OR is floating! The enable pin must be connected to ground to disable the outputs of IC1. So try to switch off S1 (or remove it) and connect pin 10 of IC1 to ground.
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