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Reference DAC Module - Discrete R-2R Sign Magnitude 24 bit 384 KHz

Interesting, thanks!

Mine is the best version availibile in a Rev5 board (dam1021-12, I think it's a mix of 0.01 and 0.02 resistors).

Signal goes from the DAM1021 single ended outputs into my own output amp/buffer/balancing stage and then back into the DCS904.

The sucessor to the Aurora, the Lynx Hilo measures better than the former has in my test, even though it uses the same converter chip:

Lynx Hilo DAC/ADC Review and Measurements (part 1: DAC) | Audio Science Review (ASR) Forum

But my DAM1021 measures far better in my test than any converter's measurements I have seen so far. Looks like it stays within 0.1 dB up to 21 bits (-124 dbB).

The DAM1021 is better at 24 bits than the Aurora16 at 20 bits and abberation at the highest levels is far lower (y-axis has 3 times the scale for the Aurora measurement). That's really something.

The advantage of the sign magnitude principle, which all my DACs and DAC modules use, level linearity, which is what really matters for music....

But ASR is kinda falling there, as they don't filter noise, so noise affect the results....

Over at SBAF they also measured a dac1541 down to -140 dB.

And check the pcm1704 datasheet, the only place I have ever seen a sinus at -110 dB look like a sinus in a datasheet....
 
This is according to the Si570 datasheet:

Settling Time for Small Frequency Change (<±3500 ppm from center frequency) is 100 µs

Settling Time for Large Frequency Change (>±3500 ppm from center frequency after setting NewFreq bit) is 10 ms

Actually the si570 datasheet also said this very important:

"the device allows reprogramming
of the DCO frequency up to ±3500 ppm from the center
frequency configuration without interruption to the
output clock."

Meaning no glitches with 3500 ppm change, the number for the si514 is no glitches with 1000 ppm change.... That what I use for my tracking, one reason I want to stick with the SiLabs parts....

But I am planning to work on my PLL, but don't expect new dam1021 firmware soon, it will come first for the dac2541, that use the Si570, and then backported to older products.
What I'm thinking about now is to extend the initial measurement of the incoming clock, before switching to the slow PLL, and then do fewer updates at higher resolution. Right now I first measure the incoming clock at 100 mS, open up for audio output, and then again measure over 1 sec and adjust. The goal was to have very shot interruptions between sample rate changes.

Remember that a lot of design decision was taken over 6 years ago....

And I will not add multiple modes, the preferred way is that it just work for any signal, adding a switch is stupid, in my opinion.
 

TNT

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Of course its better with one solution. But are you willing to miss potential performance? I mean you could ship with the "normal" setting and just make it possible for the "more interested" to have yet one level of potential SQ - I mean if it can't be reached otherwise.

You do offer different filters... why?

We can handle one more setting - no problems ;-D

//
 
How could you improve to get higher order harmonics be a bit lower?

I'm not sure it would be audible but it would probably improve business :)

//

Exatly, too many are focused just on the numbers.... I'm experimenting with calibration, which should lower measured THD, but in my opinion don't affect the sound, neither in positive or negative way. I'm already at THD of 0.003% without calibration....
 
Of course its better with one solution. But are you willing to miss potential performance? I mean you could ship with the "normal" setting and just make it possible for the "more interested" to have yet one level of potential SQ - I mean if it can't be reached otherwise.

We disagree there, I want to reach good sound quality with one PLL setting, and will prefer to work on that instead of your suggestions...

You do offer different filters... why?

We can handle one more setting - no problems ;-D

//

Different filters for sure have different sound, no disagreement there....
 
The advantage of the sign magnitude principle, which all my DACs and DAC modules use, level linearity, which is what really matters for music....

But ASR is kinda falling there, as they don't filter noise, so noise affect the results....

Over at SBAF they also measured a dac1541 down to -140 dB.

And check the pcm1704 datasheet, the only place I have ever seen a sinus at -110 dB look like a sinus in a datasheet....

Yes, I tried to explain this in other threads but the concept appears hard to grasp for many. Though it is so important, especially if you go directly into a power amp. Probably normally the 20+ bit is not so audible, but in case you have significant power amp gain, having this headroom in SNR and similar linear range (at lower branches of the R2R) matters a lot...
 
But I am planning to work on my PLL, but don't expect new dam1021 firmware soon, it will come first for the dac2541, that use the Si570, and then backported to older products.
What I'm thinking about now is to extend the initial measurement of the incoming clock, before switching to the slow PLL, and then do fewer updates at higher resolution. Right now I first measure the incoming clock at 100 mS, open up for audio output, and then again measure over 1 sec and adjust. The goal was to have very shot interruptions between sample rate changes.

Thanks Soeren, looking forward to it!
 
Soeren, would it be possible for you to impliment a real-time writeout of the (re)-clocking via the serial connection in a future version? Besides the feature to see what is going on with the re-clocking it would be interesting to check the actual sampling frequency of the incoming digital signal. I could even use it to calibrate my ADC, which has internal trimpots to adjust the frequency.
 
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Does this almost endless discussion about synchronizing multiple boards impact the majority which is the typical dam 1021 user (one board, stereo)?



Right now I first measure the incoming clock at 100 mS, open up for audio output, and then again measure over 1 sec and adjust. The goal was to have very shot interruptions between sample rate changes.
I am still using one of the first dam 1021 boards (Rev. 0.99/FPGA 0.99, couldn't update it to higher firmware)in combination with a single tube with gain. Every time the sample rate changes it makes a loud plop. Would that change/go away with the changes proposed in this discussion? I use a circuit that mutes the DAC output in order to protect my speakers but I would prefer if this problem wouldn't be there.
 
Soeren, would it be possible for you to impliment a real-time writeout of the (re)-clocking via the serial connection in a future version? Besides the feature to see what is going on with the re-clocking it would be interesting to check the actual sampling frequency of the incoming digital signal. I could even use it to calibrate my ADC, which has internal trimpots to adjust the frequency.

Don't want to add what I consider unneeded functions, the dam1021 uC just have 32K of flash, which is almost full....

Anyway the used oscillator only have 100 ppm accuracy, which would then be the precision you calibrate after....
 
Does this almost endless discussion about synchronizing multiple boards impact the majority which is the typical dam 1021 user (one board, stereo)?



I am still using one of the first dam 1021 boards (Rev. 0.99/FPGA 0.99, couldn't update it to higher firmware)in combination with a single tube with gain. Every time the sample rate changes it makes a loud plop. Would that change/go away with the changes proposed in this discussion? I use a circuit that mutes the DAC output in order to protect my speakers but I would prefer if this problem wouldn't be there.

There are some people with interest in clocking, but for most users its not an issue....

You really need to update the firmware, afaik, that should fix the sample rate change plops....
 
Soeren, would it be possible for you to impliment a real-time writeout of the (re)-clocking via the serial connection in a future version? Besides the feature to see what is going on with the re-clocking it would be interesting to check the actual sampling frequency of the incoming digital signal. I could even use it to calibrate my ADC, which has internal trimpots to adjust the frequency.

Yes it would be most interesting to see the clock adjustments - or better to see if a state is reached where only minor not-frequent adjustments are done.

But to measure frequency and adjust other devices ... ? Well it depends on your needs, but the SI clock is not what I would consider a reference for measurements.
Attached a SI570 running at fixed frequency (part of a Ian FIFO). The measurement was started after about 1 hour operation.
SI570.png
 
Does this almost endless discussion about synchronizing multiple boards impact the majority which is the typical dam 1021 user (one board, stereo)?


It's not only about multiple boards but about the converter actually syncing correctly to a source. At the very least the amplitude deviations at a quarter of the samplerate point to a potentially audible problem. Lining up a volume matched recording exactly with the original and getting seemingly random differences in output as well as (most of the time) severe flanging points to problems and makes it imposseble to difference test various setups.

Also, the susceptibility to the incoming clock just shouldn't happen with the setup. If the incoming signal can be read completely the clock should be re-generated and incoming signal shouldn't matter. But it very obviously does.

So yes, fixing this should impact all users.
 
Maybe in the famous "..... ultimate ....." thread.

IMHO, one should choose between listening to music and watching movie.
They are very different goals that require a different approach and architecture.
I wonder what the phase noise performance of the LRCK with such PLL continuos calibration.
If I was the designer I would measure the phase noise close to the DAC switches.
 
It's about more than watching movies or listening to music. This dac was sold as a "reference" dac with the explicit assertion that it would work properly in a multichannel configuration. Testing, which the vendor should have done himself to verify the proper operation in such a configuration clearly wasn't done and thus those who took said vendor at his word ended up with multiple boards that in reality won't function at "reference" levels when used in a multichannel configuration. Instead of getting what was advertised we ended up as unwitting beta testers with multiple boards which won't properly function as advertised.