Better power MOSFET models in LTSpice

lhquam · 2015-01-09 3:24 am

keantoken said:
The VDMOS internal simulator model was updated with subthreshold conduction, which is what this thread is about, so I don't know what you mean here? Many of the old models are VDMOS as well, just missing the new parameters. NMOS/PMOS are the old models which don't model subthreshold or capacitance well.

The EKV models Cordell posted might be better than the VDMOS models as far as harmonic behavior at low frequencies (not sure), but they still don't model capacitance as well as VDMOS.

What I meant to say was that the default LTSpice VDMOS models without the subthreshold parameter do not model the MOSFET well at the low currents used in some Class-A amplifiers. I find that the Cordell IRFPxxxKst (and EKV) models agree well with the FETs I have measured.

Bob Cordell · 2015-01-09 2:58 pm

keantoken said:
When the old model turns off it shoots straight to zero rather than falling naturally into the subthreshold region. This abrupt change creates a spray of harmonics that tends to stimulate any resonances in the circuit. This is always present if you use the old model, even if it is attenuated by high bias, and causes high frequency impulses that can cause strange behavior.

It's easily possible that the model itself isn't causing circuit instability, but that it is simply stimulating a resonance already present in the amplifier. If however you have both MOSFETs biased low enough that both of them fall in the "dead zone" where there should have been subthreshold conduction, the open-loop gain of your amp can fall dramatically and start doing things that are hard to predict. This is a flaw in the old MOSFET model, not in the circuit.

Excellent explanation!

Cheers,
Bob

keantoken · 2015-02-03 3:02 pm

Apparently the anomaly in the old model is called a "discontinuity". After reading this article by Mike, we can see he also had his own reasons for improving the model:

http://www.linear.com/docs/en/lt-jo...01-df-SPICEDifferentiation-MikeEngelhardt.pdf

lhquam · 2015-03-16 12:17 am

This thread has been silent for a long time. Has there been anymore work on either the modeling techniques or the parameters for additional VDMOS FETs?

keantoken · 2015-03-16 12:28 am

Yes, we are still working on the details, just not confident yet. At any rate, don't feel you have to wait for "us" or any one else. You can add the 'ksubthres' parameter to any existing VDMOS model and figure out roughly how it works yourself.

pergo · 2015-03-25 11:48 am

My feedback from VSSA design.

With the "C" models, i need more Vgs for the same quiescient current (10mA).
I get more bandwidth than "kst" at same bias point.
I've some little glitch on crossover region at 20kHz full power, but maybe is due to something else (bad driver).

Thank you.

keantoken · 2015-06-21 8:24 pm

Hello. Finally I am able to make an update. Here are models for the Alfet/Exicon/Semelab 10x20 and 20x20 lateral MOSFETs. These models might not be absolutely perfect, but they've really been through the wringer! These are even more special because they use inline calculation to accurately model temperature effects.

The first set of models with the 'Tjp' suffix use the Tjp parameter to adjust the model for a specific temperature.

To use these models, you will have to add to your simulation the parameter:

.param Tjp=Temp

to your schematic. 'Temp' is the global variable LTSpice uses for temperature. It is 27C by default. If you want to run the simulation with these models at 75C instead, use

.param Tjp=75C

The next set of models with the 75C suffix are fixed at 75C and don't use or require the Tjp parameter. There are drop-in models and don't need any special treatment.

Code:

*
*		MOSFET VDMOS Models with ksubthres
*
*
*10N20-Tjp VDMOS with subthreshold (c) Ian Hegglun 21 May 2015
.model 10N20-Tjp VDMOS (Rg=60 Vto={0.17-1.6m*(Tjp-25)} Lambda=3m
+ Rs={0.245*(1+2.6m*(Tjp-25))} Kp={1.30/(1+8.3m*(Tjp-25))}
+ Ksubthres={0.095*(1+2.9m*(Tjp-25))} Mtriode=0.3 Rd={0.6*(1+3m*(Tjp-25))}
+ Cgdmax=100p Cgdmin=5p a=0.25 Cgs=600p Cjo=1100p  
+ m=0.7 VJ=2.5 IS=4.0E-6 N=2.4 mfg=IH150521)
*
*
*
*10P20-Tjp VDMOS with subthreshold (c) Ian Hegglun 21 May 2015
.model 10P20-Tjp VDMOS (pchan Rg=60 Vto={-0.535+1.7m*(Tjp-25)} 
+ Rs={0.37*(1+3.4m*(Tjp-25))} Kp={0.995/(1+6.7m*(Tjp-25))} Rd=0.2
+ Ksubthres={0.12*(1+3.1m*(Tjp-25))} Mtriode=0.4 Lambda=5m
+ Cgdmax=100p Cgdmin=5p a=0.25 Cgs=600p Cjo=1100p  
+ m=0.7 VJ=2.5 IS=4.0E-6 N=2.4 mfg=IH150521)
*
*
*
*20N20-Tjp VDMOS with subthreshold (c) Ian Hegglun 21 May 2015
.model 20N20-Tjp VDMOS (Rg=30 Vto={0.155-1.6m*(Tjp-25)}
+ Rs={0.12*(1+2.5m*(Tjp-25))} Kp={2.40/(1+7.4m*(Tjp-25))}
+ Ksubthres={0.09*(1+1m*(Tjp-25))} Mtriode=0.3  Rd=0.16 Lambda=3m
+ Cgdmax=200p Cgdmin=10p a=0.25 Cgs=1200p Cjo=2200p 
+ m=0.7 VJ=2.5 IS=8.0E-6 N=2.4 mfg=IH150521)
*
*
*
*20P20-Tjp VDMOS with subthreshold (c) Ian Hegglun 21 May 2015
.model 20P20-Tjp VDMOS (pchan Rg=30 Vto={-0.61+2.2m*(Tjp-25)} 
+ Rs={0.17*(1+2.0m*(Tjp-25))} Kp={1.85/(1+8.4m*(Tjp-25))} 
+ Ksubthres={0.105*(1+5m*(Tjp-25))} Mtriode=0.35 Rd=0.05 Lambda=5m
+ Cgdmax=200p Cgdmin=10p a=0.25 Cgs=1200p Cjo=2200p 
+ m=0.7 VJ=2.5 IS=8.0E-6 N=2.4 mfg=IH150521)
*
*
**************************************************************
*10N20-75C VDMOS with subthreshold (c) Ian Hegglun 21 May 2015
.model 10N20-75C VDMOS (Rg=60 Vto=0.09 Lambda=3m 
+ Rs=0.277 Kp=0.92 Rd=0.7 Ksubthres=0.11 Mtriode=0.3  
+ Cgdmax=100p Cgdmin=5p a=0.25 Cgs=600p Cjo=1100p  
+ m=0.7 VJ=2.5 IS=4.0E-6 N=2.4 mfg=IH150521)
*
*
*
*10P20-75C VDMOS with subthreshold (c) Ian Hegglun 21 May 2015
.model 10P20-75C VDMOS (pchan Rg=60 Vto=-0.45 Lambda=5m 
+ Rs=0.432 Kp=0.745 Rd=0.2 Ksubthres=0.14 Mtriode=0.4   
+ Cgdmax=100p Cgdmin=5p a=0.25 Cgs=600p Cjo=1100p  
+ m=0.7 VJ=2.5 IS=4.0E-6 N=2.4 mfg=IH150521)
*
*
*
*20N20-75C VDMOS with subthreshold (c) Ian Hegglun 21 May 2015
.model 20N20-75C VDMOS(Rg=30 Vto=0.076 Lambda=3m 
+ Rs=0.135 Kp=1.75 Rd=0.16 Ksubthres=0.095 Mtriode=0.3 
+ Cgdmax=200p Cgdmin=10p a=0.25 Cgs=1200p Cjo=2200p 
+ m=0.7 VJ=2.5 IS=8.0E-6 N=2.4 mfg=IH150521)
*
*
*
*20P20-75C VDMOS with subthreshold (c) Ian Hegglun 21 May 2015
.model 20P20-75C VDMOS (pchan Rg=30 Vto=-0.500 Lambda=5m
+ Rs=0.187 Kp=1.304 Ksubthres=0.13 Mtriode=0.35 Rd=0.05
+ Cgdmax=200p Cgdmin=10p a=0.25 Cgs=1200p Cjo=2200p 
+ m=0.7 VJ=2.5 IS=8.0E-6 N=2.4 mfg=IH150521)
*
*
********************************************************

AndrewT · 2015-06-21 8:49 pm

That sounds like a large body of work
Thanks, even though I have still not learned how to work with LTspice.

keantoken · 2015-06-21 9:01 pm

Here is a quick schematic with the models already added so you can start playing around right away.

Bob Cordell · 2015-06-21 11:00 pm

keantoken said:

Hello. Finally I am able to make an update. Here are models for the Alfet/Exicon/Semelab 10x20 and 20x20 lateral MOSFETs. These models might not be absolutely perfect, but they've really been through the wringer! These are even more special because they use inline calculation to accurately model temperature effects.

The first set of models with the 'Tjp' suffix use the Tjp parameter to adjust the model for a specific temperature.

To use these models, you will have to add to your simulation the parameter:

.param Tjp=Temp

to your schematic. 'Temp' is the global variable LTSpice uses for temperature. It is 27C by default. If you want to run the simulation with these models at 75C instead, use

.param Tjp=75C

The next set of models with the 75C suffix are fixed at 75C and don't use or require the Tjp parameter. There are drop-in models and don't need any special treatment.

Code:

*
*		MOSFET VDMOS Models with ksubthres
*
*
*10N20-Tjp VDMOS with subthreshold (c) Ian Hegglun 21 May 2015
.model 10N20-Tjp VDMOS (Rg=60 Vto={0.17-1.6m*(Tjp-25)} Lambda=3m
+ Rs={0.245*(1+2.6m*(Tjp-25))} Kp={1.30/(1+8.3m*(Tjp-25))}
+ Ksubthres={0.095*(1+2.9m*(Tjp-25))} Mtriode=0.3 Rd={0.6*(1+3m*(Tjp-25))}
+ Cgdmax=100p Cgdmin=5p a=0.25 Cgs=600p Cjo=1100p  
+ m=0.7 VJ=2.5 IS=4.0E-6 N=2.4 mfg=IH150521)
*
*
*
*10P20-Tjp VDMOS with subthreshold (c) Ian Hegglun 21 May 2015
.model 10P20-Tjp VDMOS (pchan Rg=60 Vto={-0.535+1.7m*(Tjp-25)} 
+ Rs={0.37*(1+3.4m*(Tjp-25))} Kp={0.995/(1+6.7m*(Tjp-25))} Rd=0.2
+ Ksubthres={0.12*(1+3.1m*(Tjp-25))} Mtriode=0.4 Lambda=5m
+ Cgdmax=100p Cgdmin=5p a=0.25 Cgs=600p Cjo=1100p  
+ m=0.7 VJ=2.5 IS=4.0E-6 N=2.4 mfg=IH150521)
*
*
*
*20N20-Tjp VDMOS with subthreshold (c) Ian Hegglun 21 May 2015
.model 20N20-Tjp VDMOS (Rg=30 Vto={0.155-1.6m*(Tjp-25)}
+ Rs={0.12*(1+2.5m*(Tjp-25))} Kp={2.40/(1+7.4m*(Tjp-25))}
+ Ksubthres={0.09*(1+1m*(Tjp-25))} Mtriode=0.3  Rd=0.16 Lambda=3m
+ Cgdmax=200p Cgdmin=10p a=0.25 Cgs=1200p Cjo=2200p 
+ m=0.7 VJ=2.5 IS=8.0E-6 N=2.4 mfg=IH150521)
*
*
*
*20P20-Tjp VDMOS with subthreshold (c) Ian Hegglun 21 May 2015
.model 20P20-Tjp VDMOS (pchan Rg=30 Vto={-0.61+2.2m*(Tjp-25)} 
+ Rs={0.17*(1+2.0m*(Tjp-25))} Kp={1.85/(1+8.4m*(Tjp-25))} 
+ Ksubthres={0.105*(1+5m*(Tjp-25))} Mtriode=0.35 Rd=0.05 Lambda=5m
+ Cgdmax=200p Cgdmin=10p a=0.25 Cgs=1200p Cjo=2200p 
+ m=0.7 VJ=2.5 IS=8.0E-6 N=2.4 mfg=IH150521)
*
*
**************************************************************
*10N20-75C VDMOS with subthreshold (c) Ian Hegglun 21 May 2015
.model 10N20-75C VDMOS (Rg=60 Vto=0.09 Lambda=3m 
+ Rs=0.277 Kp=0.92 Rd=0.7 Ksubthres=0.11 Mtriode=0.3  
+ Cgdmax=100p Cgdmin=5p a=0.25 Cgs=600p Cjo=1100p  
+ m=0.7 VJ=2.5 IS=4.0E-6 N=2.4 mfg=IH150521)
*
*
*
*10P20-75C VDMOS with subthreshold (c) Ian Hegglun 21 May 2015
.model 10P20-75C VDMOS (pchan Rg=60 Vto=-0.45 Lambda=5m 
+ Rs=0.432 Kp=0.745 Rd=0.2 Ksubthres=0.14 Mtriode=0.4   
+ Cgdmax=100p Cgdmin=5p a=0.25 Cgs=600p Cjo=1100p  
+ m=0.7 VJ=2.5 IS=4.0E-6 N=2.4 mfg=IH150521)
*
*
*
*20N20-75C VDMOS with subthreshold (c) Ian Hegglun 21 May 2015
.model 20N20-75C VDMOS(Rg=30 Vto=0.076 Lambda=3m 
+ Rs=0.135 Kp=1.75 Rd=0.16 Ksubthres=0.095 Mtriode=0.3 
+ Cgdmax=200p Cgdmin=10p a=0.25 Cgs=1200p Cjo=2200p 
+ m=0.7 VJ=2.5 IS=8.0E-6 N=2.4 mfg=IH150521)
*
*
*
*20P20-75C VDMOS with subthreshold (c) Ian Hegglun 21 May 2015
.model 20P20-75C VDMOS (pchan Rg=30 Vto=-0.500 Lambda=5m
+ Rs=0.187 Kp=1.304 Ksubthres=0.13 Mtriode=0.35 Rd=0.05
+ Cgdmax=200p Cgdmin=10p a=0.25 Cgs=1200p Cjo=2200p 
+ m=0.7 VJ=2.5 IS=8.0E-6 N=2.4 mfg=IH150521)
*
*
********************************************************

This is a great contribution and I know it was a lot of work!

Cheers,
Bob

fas42 · 2015-06-21 11:51 pm

Well done - thanks! :up:

...

bwaslo · 2015-06-22 12:01 am

Has anyone come up with an updated DN2540 yet? I recently ran made a badly failed sim that acted way different from the built circuit, due to the nonlinear D-G capacitance of this part.

Also, if anyone is still taking requests... how about the Infineon IPP80N06S2L-07 (uncommon, I know....)?

keantoken · 2015-06-22 12:39 am

I tried the LND150 and DN2540 but I couldn't get the model to fit the datasheet. It would be nice to see some curve traces of these transistors to compare with the datasheet.

bwaslo · 2015-06-23 6:38 pm

sorry, I don't have a curve tracer, wish I did. Is anyone else working on this one?

keantoken · 2015-06-23 8:47 pm

Often you can find curves on Google. I did find this:

Transistor Curve Tracer | Bartola Valves

If I get the time I will load that into LTSpice and see if it lends itself to the new model.

bwaslo · 2015-06-24 6:21 am

Thanks keantoken,

I appreciate the effort.

bwaslo · 2015-06-24 6:40 am

Kentoken,

I found this on the web --

via a forum at srx revisited - Page 2 - Do It Yourself - www.Head-Case.org

Not sure if this is much help. He did it with various resistors in the Source connection, so the only one of interest is probably the R=0 set. He said his TO-92 parts behaved differently than the TO-220 parts the curves are for. I'm using the TO-92 atm.

Bill

astx · 2015-07-22 1:50 pm

keantoken said:
Hello. Finally I am able to make an update. Here are models for the Alfet/Exicon/Semelab 10x20 and 20x20 lateral MOSFETs.
...

Ultracool!

bwaslo · 2015-07-31 7:51 pm

bwaslo said:
Kentoken,

I found this on the web --

via a forum at srx revisited - Page 2 - Do It Yourself - www.Head-Case.org

Not sure if this is much help. He did it with various resistors in the Source connection, so the only one of interest is probably the R=0 set. He said his TO-92 parts behaved differently than the TO-220 parts the curves are for. I'm using the TO-92 atm.

Bill

I'm just now noticing -- these curves show up to 40mA current draw at 0Vdc. Pretty neat trick.... Guess this curve isn't so helpful...

I found a curve tracer on the 'bay (cheap heatkit old thing). If I can get it working (and if I can get numbers from the curves and not just pictures) I should be able to come up with some data soon.

keantoken · 2015-08-01 1:07 am

That would be very helpful, if it is able to do constant-power curve traces, so that electrothermal effects don't ruin the results.

Better power MOSFET models in LTSpice

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