I treat all this as a meditation. I like spending a few hours with a
repetitive task like testing jfets or soldering up beasts.
Boredom is my friend.
I like running parts through the curve tracer to see what it can do. Sometimes it takes a while to find the right combination of setting to see a useful area.
I treat all this as a meditation. I like spending a few hours with a
repetitive task like testing jfets or soldering up beasts.
Boredom is my friend.
meditation is cessation of mind
then the inner witness is established
> I like running parts through the curve tracer to see what it can do.
So have you done this for 1000 devices, 8 hours a day, day after day ?
I have.
And 1000 devices will take 10x 8-hour days for curve tracing under stabilised temprature.
That is excluding the data processing and the manual sorting afterwards.
Cheers,
Patrick
So have you done this for 1000 devices, 8 hours a day, day after day ?
I have.
And 1000 devices will take 10x 8-hour days for curve tracing under stabilised temprature.
That is excluding the data processing and the manual sorting afterwards.
Cheers,
Patrick
Some progress is happening. I have settled on the P-JFET. The <Super Secret> XXX seems to be usable for a Beast build. It is no Toshiba 2SJ74 by any means but I think it can be used successfully.
I paralleled 4 random devices and get the following at -15V Vds
Idss = ~29mA
gm = ~39 milli-Siemens
Rds = ~43 ohms
To obtain 1A bias at Idss will require ~137 devices.
I am using TO-92 devices for convenience of testing. The TO-92 J270 is obsolete. The MMBFJ270 surface mount device is in production.
I have ordered some Toshiba 2SK209-GR as Patrick has suggested and will evaluate those for the N-JFET.
I paralleled 4 random devices and get the following at -15V Vds
Idss = ~29mA
gm = ~39 milli-Siemens
Rds = ~43 ohms
To obtain 1A bias at Idss will require ~137 devices.
I am using TO-92 devices for convenience of testing. The TO-92 J270 is obsolete. The MMBFJ270 surface mount device is in production.
I have ordered some Toshiba 2SK209-GR as Patrick has suggested and will evaluate those for the N-JFET.
Probably not going to do it that way. The implementation will not be matched pairs. Instead it will be a monolithic ganged device with no source resistors. It will have 1 ohm (or smaller) drain resistors to allow current measurement.
The number of individual devices in each ganged device will likely be uneven. The idea is to populate enough devices to obtain the desired bias current and then add or subtract devices to obtain as close to zero output voltage offset as possible. Through hole drain resistors will allow disconnecting individual devices.
I will start small and do proof of concept.
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Whatever type of JFETs you take, there are variations in Idss.
For example a batch of 100x 2SK209GR from the same tape can typically vary between 2.5mA and 5.5mA.
If you use them in random and apply the same Vds, the dissipation can differ by 100%.
And of course they have a positive tempco, so you will get some sort of thermal runaway.
Of coursse we can thermally couple them to a heat spreader.
That helps somewhat to equalise the case temperature.
But a SOT23 or TO92 package has relatively high thermal resistance junction-to-case.
So the heat spreader only solves a part of your problem.
Unless you run them much lower than their Idss.
Or apply a cascode to reduce the dissipation to say 20mW or so.
Done that all before.
Patrick
For example a batch of 100x 2SK209GR from the same tape can typically vary between 2.5mA and 5.5mA.
If you use them in random and apply the same Vds, the dissipation can differ by 100%.
And of course they have a positive tempco, so you will get some sort of thermal runaway.
Of coursse we can thermally couple them to a heat spreader.
That helps somewhat to equalise the case temperature.
But a SOT23 or TO92 package has relatively high thermal resistance junction-to-case.
So the heat spreader only solves a part of your problem.
Unless you run them much lower than their Idss.
Or apply a cascode to reduce the dissipation to say 20mW or so.
Done that all before.
Patrick
Beast photographs
Zen Mod was not sure if he could share these pictures of the new build, but they are not secret. I built the cabinets, Nelson is stuffing the boards. Just one of the 4 boards is shown in the cabinets, and it is not stuffed. But you get the idea.
Zen Mod was not sure if he could share these pictures of the new build, but they are not secret. I built the cabinets, Nelson is stuffing the boards. Just one of the 4 boards is shown in the cabinets, and it is not stuffed. But you get the idea.
Attachments
Besides different devices, it has a different topology.
Actually there are 4 versions so far. Fullrange and I will be evaluating
all of them in the coming months.
I have been evaluating the J113 on the curve tracer and looking for a matching P-JFET. So far, nothing I have found matches the J113 to make a complementary pair.
So, my prediction is that a J113 topology will not be complementary. Maybe long tail pair or B1-style ? Beast with a thousand tails?
If I find a P-JFET that matched the J113, I will change that prediction.
It is enjoyable to scour JFET offerings from distributors and evaluate parts.
J176 depends on what Idss you can obtain in large quantity. If Idss = 20mA, then you have to cascode.
For non-cascode, I think Idss should be 5mA - 8mA and gm has to be at least equal to Idss. So an 8mA Idss JFET should be at least 8 milli-Siemens.
The nice thing about 2SK170 is that when Idss is 8mA, gm is 20-30 milli-Siemens.
J176 has a much larger Rdson than 2SK170