lingDAC - cost effective RBCD multibit DAC design

Hi Richard

I think you made a great choice by adding a dac in anti-phase and not using its output. To me single ended sounds better than a differential topology. Sounds more spacious and 3d, sweeter, easier to listen to. Be it 1543, 1545 or 1387. I believe the better sound is because of slightly higher 2nd harmonic component.

One fellow asked about segmentation. I´m pretty sure the 1387 already uses segmentation internally, in the same manner the PCM1704 does (sign magnitude dac). At least one philips catalog confirms this, as well as my own experience with the dac (sounds to me very linear and clean, and engaging).

Regards
Alex
 
A few years ago I was advocating a few thousand uF to be put on pin7, these days I use nothing at all as I hear no improvement when I do add some amount of capacitance.
Perhaps there is a degree of noise cancellation at that node? Because the anti-phase dac produces anti-noise and both are connected at that node.

Ok, enough from me:)
Thanks for sharing Richard.
-Alex
 
Bartb, the intent is to "generate" a pure resistive load for the regulator that supplies the dacs. Constant current.

Richard found that the 1387 takes in a varying current at its V+ pin. This generates noise because of non-zero supply impedance. This noise (on the V+ node) ends up in your analog output because of poor PSRR of the dac chip.

Adding the anti-phase dac (inverted data) and connecting to the same regulator will load it with a complementary current. The sum is constant, which is what the regulator sees (a resistor). Easy job for the regulator and one noise/distortion mechanism is eliminated, at least this is the intent (and I think it is indeed realized to a good degree and beneficial to the sound).

A further benefit might be cancellation of noise in the Vref node (pin 7), Richard says the node no longer needs caps.
 
Last edited:
Bartb, the intent is to "generate" a pure resistive load for the regulator that supplies the dacs. Constant current.

Richard found that the 1387 takes in a varying current at its V+ pin. This generates noise because of non-zero supply impedance. This noise (on the V+ node) ends up in your analog output because of poor PSRR of the dac chip.

Adding the anti-phase dac (inverted data) and connecting to the same regulator will load it with a complementary current. The sum is constant, which is what the regulator sees (a resistor). Easy job for the regulator and one noise/distortion mechanism is eliminated, at least this is the intent (and I think it is indeed realized to a good degree and beneficial to the sound).

A further benefit might be cancellation of noise in the Vref node (pin 7), Richard says the node no longer needs caps.

Hello Alexandre,
thanks for the very clear explanation.
Do I guess correctly that it is the (only) function of the 74HC86D to invert the data ?
(Will have to examine connections to see how it does it :), will start from I2S format being "two’s complement with the MSB first" ? )
 
Last edited:
Do I guess correctly that it is the (only) function of the 74HC86D to invert the data ?

Inverts and buffers, and also limits the digital outputs (see how it´s powered by 2.5V from TL431? Very nicely done, IMO.

It presents a perfect simultaneous digital signal to both dac chips, which wouldn´t be the case with ´HC04 inverters.

It´s very simple: XOR gate (exclusive or) is like OR but gives zero when both inputs are 1.

So it acts as an inverter if you tie one of the inputs to V+. If you tie to GND it is just a buffer.
 
Inverts and buffers, and also limits the digital outputs (see how it´s powered by 2.5V from TL431? Very nicely done, IMO.

It presents a perfect simultaneous digital signal to both dac chips, which wouldn´t be the case with ´HC04 inverters.

It´s very simple: XOR gate (exclusive or) is like OR but gives zero when both inputs are 1.

So it acts as an inverter if you tie one of the inputs to V+. If you tie to GND it is just a buffer.

Yes! Very nice. Now it's clear. Thanks
 
Curious for the reason of L1 being bridged on the SE Buffer I have? - similar to randytsuch pictured.

L1 and the two tall electrolytics are primarily there to reduce HF noise if a switching PSU is used. As for example the use case where the buffer's powered from the USB port of a mobile phone. With a clean linear supply there's no big advantage to fitting the inductor, just a little reduction of higher freq noise.
 
How about replacing R6,R41 4.7k with a volume control pot. ?

Doesn't look like a great idea to me - the 4k7 value is replaced by something higher for line output (rather than driving headphones). Even a 5k pot would have too high output impedance (over 1k in its centre) to be suitable for connecting cables to. If you want a volume control you'd be better off fitting it at the output of the filter-I/V stage - there's a 4k7 which could be replaced by a 5k pot fairly comfortably. There's DC on it though which a pot might not like - though a wire-wound pot probably will be OK.
 
did i miss something?
Cant find the gerber files for the DAC and I/V PCB. As i think. the power supply is still in work.

No, you didn't miss anything - those files I haven't posted up yet. All in due course :)

Power supply will be a while as the PCB hasn't been sent for manufacture yet, but that could go off any day now....

@Alex - thanks for your encouraging comments and background info :D Off the top of my head L1 on the DAC board is just under 0.1R nominal DCR.
 
Last edited:
Hi Ken - good question.

The aim there is to give the 'passive' DAC as close as possible the same voltage on its outputs as the active one. In the basic configuration only one DAC's outputs are taken to the I/V stage, the other DAC is there solely as a 'dummy' to balance out the current drawn by the active DAC (the current draw being signal dependent). I figured to get the best cancellation it might be best to give both DACs the same output voltage, but I've not actually gone and verified this.

With the original v1 lingDAC the outputs were held at +4.5V by the I/V stage, this necessitated two green LEDs in series (2.2V each) to get to the desired voltage. On v2 lingDAC the I/V stage holds the output around +1.1V - this needs a single IR LED, the other LED footprint will be fitted with a 0R link.

Hi Richard, do you mean current offset of passive dac is cancelled by the dummy dac?


also does U7 prep the WS signal for better SQ?

thank you
 
I'm not sure what you mean by 'passive dac' here. The dummy DAC isn't contributing to the output current, only there to draw power supply current to compensate for the variable supply current of the main DAC.

U7 is there to provide complementary, buffered data signals to the DACs and not to introduce significant skew between the data and clock signals.