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Suggestions please for 16-channel 24-bit digital audio recorder
Suggestions please for 16-channel 24-bit digital audio recorder
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Old 10th April 2017, 08:15 AM   #31
mhelin is offline mhelin
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Join Date: Apr 2003
Location: Tampere Finland Europe
CS8416 board:

https://www.aliexpress.com/item/Free...246068567.html

Software controlled.

Last edited by mhelin; 10th April 2017 at 08:20 AM.
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Old 10th April 2017, 08:11 PM   #32
mhelin is offline mhelin
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Join Date: Apr 2003
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Related to Ultranet protocol a patent application which is really odd, basically they apply patent for using S/PDIF or AES to transfer multichannel audio by marking the LSB of 24-bit word (actually it's the LSB of auxliarry information channel on AES3) by bit 1, for other channels it zero (so the data is actually 23-bit):

https://www.google.com/patents/US20130177158

Btw. MADI standard is actually quite similar to Ultranet in that the preambles are coded little bit differently to mark the frames, and data is otherwise transmitter as multiplexed stream. So Ultranet is like a poor man's MADI or MADI-X.
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Old 11th April 2017, 07:27 PM   #33
tuck1s is offline tuck1s  United Kingdom
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Interesting .. I wonder if Behringer have licensed that themselves (or own the company quoted on the patent).

Also, bit-stealing the LSB to provide a side-channel (for frame sync etc) is common practice in standard telephony PCM (such as T1, used to carry 24 channels). One would assume they would have checked the prior art there.
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Old 12th April 2017, 06:36 AM   #34
mhelin is offline mhelin
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As far as I know the "patent" is just the application for a patent. Besides AES3 specifications tell that the aux bits in time slots 4 - 7 can be used for anything if not used to provide the the bits 20 - 23 in PCM audio. So the patent application is practically worthless.

Anyway, after being studied the AES3 specifications I think that Behringer just uses the aux audio bits for framing the eight channel. The preambles are used for the interface itself and are fixed (and besides follow the parity bit coding though are not using biphase coding themselves), otherwise the AES/SPDIF receiver couldn't detect the frames and subframes at all, or the start of the 192 frame, so you cannot use other patterns with them.

So in the stream there are only left the aux audio bits, the 20 audio bits and the status bits (validity, user, channel status, and parity bits), so that explains the fact that there are available only 20 bits for the audio data. The status bits are available from other output pins of the receiver chips, or can be accessed using SPI or I2C depending on the receiver implementation.

Nevertheless, it would be interesting to be able to see the data received before SPDIF receiver. It's NRZI decoded so it might be difficult to read, but I guess you could sample the stream as much as fits into memory of your scope or USB dongle (using the storage functions) and try locating the preambles and data received afterwards on computer screen. The NRZI preambles are listed on Wiki:
AES3 - Wikipedia
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Old 19th April 2017, 02:24 AM   #35
psg is offline psg  United States
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Gentlemen,

I'm very pleased to see that you guys are still pursuing this.

I'm the guy that wants to retrofit the Mackie SA1232's to behave somewhat like a pair of Turbosound IQ-series speakers, i.e. with an Ultranet input and passthrough. The passthrough output would be nice, but not strictly necessary.

For my application decoding only the top stereo pair, channels 15 & 16 would do, and I'd build two of these, one for each speaker.

It just occurred to me that if I can persuade a decoder/DAC board to sync properly to the single stream of data from one differential pair coming from a Magjack, then I may not even need any sort of CPU at all.

Can a CS8416 be persuaded to handle the format that Ultranet is sending on one pair?
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Old 19th April 2017, 09:45 PM   #36
mhelin is offline mhelin
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Join Date: Apr 2003
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Good question, I think if you can design a circuit with a serial comparator triggered by the raising edge of the LRCLK from SPDIF you might be able to generate a TDM sync pulse which you might need to delay, or delay the data line to be able to extract a stereo pair for a TDM supported stereo DAC. Use some circuit simulator for developing the circuit, shouldn't be that hard.
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Old 1st September 2017, 01:10 PM   #37
zindello is offline zindello
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I too, am also interested in a hardware only version. The application is a "receiver" stage box that I can use with an X18 to run the monitors/mains. I'm happy to chip in to help someone build such a device, or just a single channel receiver with a 1-8 or 9-16 selector switch and an 8 position rotary to select th channel. That could be mounted inside a powered cabinet. I have some electronics experience, but digital electronics are a little beyond my capability
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Old 15th October 2017, 12:14 AM   #38
fastfourier is offline fastfourier  Canada
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Hi all,

I have had some success capturing Ultranet on a Pi 3B following the excellent work of tuck1s. I'm using the AM26LV32 + WM8806, and a modified simple_card.c kernel module. I'm getting all 8 channels nicely by recording stereo 192kHz. Source is an X32 rack @ 48kHz.

I'm not sure how to sync to the first channel, or if I'm doing something wrong with the WM8806. It's in hardware control mode, and the control pins are set the same as in tuck1s' schematic.

The low 2 bits of the 24-bit audio word are usually 00, but a couple of times a second they burst into life for about 100ms and identify the channel pair (00=1/2, 01=3/4, 10=5/6, 11=7/8).

I thought it might be something I'm doing wrong with ALSA, but I can also see those bits coming and going on a scope. If I send audio down one channel and just strip out every 32-bit word which is > 0x300, I get crystal clear audio so I can be reasonably confident (?) that the WM8806 is set up properly.

It seems to me that those channel ID bits should be set all the time. I'm sure I could code around it as-is, but it seems wrong - Anyone know what's going on?
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Old 21st June 2018, 02:37 PM   #39
sailort is offline sailort
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Join Date: Jun 2018
Hi guys,

This is very interesting topic. Did anyone marked success so far with extracting Ultranet channels directly to DAC without using any MCU/FPGA related stuff? Been investigating a bit, and:

- CS8416 seems suitable for extracting AES3 signal directly
- PCM1861 can decode 8 channel TDM stream directly to 8 DAC

What's seems now as a problem, is that LRCLK signal is not directly aplicable as TDM marker (for PCM1861). But I think this would be doable with some serial latch and logic gate to extract frame start bit from LRCLK transition from R to L channel.
PCM1861 expect 24 bits LSB, seems ignoring next 8 bits. This seems to be directly compatible with CS8416 output in AES3 direct mode.

What do you think? Is this a viable? Or a no-go?

Would be nice to have some sort of Ultranet smaller monitoring mixer, possibly with 16 outs (on 3.5mm jacks) to feed any mixer, with returns for two balanced / four unbalanced channels available via some RJ45 breakout boxes. Powered via USB (chargers everywhere).

T.
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