Variable operating biass output ?

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Biasing output transistor is how to manage the transistor not getting off when crossing using input voltage bias (Vbe or Vgs).
Crossing management is a wider option, both positive transistor and negative transistor has different drivers and controller, it is able to turn on the opposite transistor while in high voltage output operation .For example, positive transistor is at high current operation 10A with +30V output, in biasing is unable to make negative transistor creating 2A small spike, and positive transistor still draw 10A. Ofcourse doing that is not necessary, but it needed when crossing.
I post one of them here.
http://www.diyaudio.com/forums/ever...si-not-bad-really-i-post-some-proof-here.html
 
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The circuit "voltamp.pdf" using current-output based driving. I am also using current-output based driving, the difference is it compare the current output with output voltage. Only using current is enough, but it become less precise in low current, and normally they are very low when crossing.
 
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OK, thanks for the link..I see you are explaining some crossover events in a circuit which, being mosfet and with quite likely different offsets to bipolar, is not so easy to imagine. It may be possible that the smaller voltages of bipolar crossover differences are not so readily corrected too.

Unfortunately, a circuit for the mosfet guys and for bipoloars is going to be needed for reference here.
 
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If there is one area of transistor simulations we might question it is crossover or switching behaviour. In FET behaviour most readily available EDA models are still hopelessly inaccurate. I would get a better opinion on that but the traffic in queries for better models on forum suggests there is still a significant problem even for the pros. :(

To be taken seriously, I think Mooly's signature of design, build test is necessary.
 
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I agree, like when it simulated and reach 0,000009% distortion, the simulator must be joking. No, not joking but error.
But this quasi (now using 2xIRFP260N) is now working as good as H6660 (my non quasi version). The problem is at its tracking rail, It will have mixed linear + digital regulator (similar with EEEngine but different).
 
Sorry I don't have any reference, If you have please post. I am just trying to find a way to eliminate crossover distortion without thermal problem, thinking simulating, built, searching a way and more. This is some example (but not cross management, just another way):
http://www.diyaudio.com/forums/soli...-unfinished-schematic-shared.html#post2212507

Thanks for the schemas. I recommend to investigate in the first step only the output buffer stage (i. e. without the cascoded differential input and VAS stage). Then you safe a lot of time, because in case of unwanted occured effects the carry out of troubleshooting is much more easy (voltage gain now <1).
 
You mean VL85?, Don' worry the output stage will be tested first. I am still try to improve it, their BJT still have bad saturated condition at clipping. I am going to place some Rb. If it has good test result after first build, it will be applied on H6 series instead of using fixed bias with thermal tracking on it. Later version sanken transistors has very good reliability and performance compared to hexfets, and my friend (MODer) also recommend it.
 
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Thanks Tiefbass, for the links and particularly to Levinson's Adaptive bias. This looks too simple to be true. As usual, there is probably a bit more work to get a functional design than the promotional stuff says. Does anyone know if a DIY clone has been built and tried?i

OOps, have I misunderstood your scheme, I did not read your title "Adaptive bias", Edmond.
 
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Class-A?! Weren't we talking about class-AB with an adaptive bias control?

I get a bit confused between non-switching Class AB and low bias Class A, there seems to be a grey area here so forgive my confusion !

At the end of the day I'm looking for a free lunch, Class A performance on a Class B budget. My goals when I started this thread were to take a Class AB amp and improve it's harmonic distortion performance to Class A. In resurecting this thread my goals are a bit different - I'd like to take a Class A amp and improve it's thermal performance to Class AB.

Some goals I have would be:

1/ the harmonic profile of the output would have Hiraga smiling - if distortion is present at all it should be dominated by H2, a bit of H3, and then the rest being lower and monotonically disappearing into he sunset.

I suspect (but am not sure) that output devices should always be conducting and doing so in a meaningful way - i.e. not just hanging on by the skin of their teeth to some tiny fixed idle current which has the only purpose of preventing a device from switching hard off

I also suspect (but am not sure) that the topology should operate in what might be recognized as class A with a very low bias current and doesn't go into Class B within the intended operating range and ideally (but no reqd.) softly clips before it ever gets to Class B.

2/ the thermal loading is similar to Class AB and I'd quantify this by saying I believe a bias current of <0.2A should be the goal.

3/ can be implemented fairly simply (parts count, set up) without nasty consequences (tetchy oscillations, low dynamic headroom, unrealistic perfect devices or device matching)


Anyhow, this now rules out (for me) the Gevel & Huon, Blomley, Tanaka and Margan approaches because they fall at the first hurdle and don't satisfy condition 1. Renardson fails to meet condition 2 since half the output stage has to stay in full Class A.

PaulBysouth's suggestion of "to monitor the output bias current, and continuously adjust the bias circuit using a small microprocessor" sounds feasible and I've seen this implemented on a tube amplifier (seen, no heard). But it fails to meet condition 3.

Mooly's approach is a very nice simple and reliable approach as far as I can see. But it doesn't meet condition 2.

I don't understand enough about Edmond's approach but it looks as if it would be possible to maintain a bias current through the output at all times. I'm not so confident that it can meet condition 1.

I'm going to have to take a better look at XD, Krell and Levinson not to mention the wealth of links from tiefbassuebertr !
 
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If there is one area of transistor simulations we might question it is crossover or switching behaviour. In FET behaviour most readily available EDA models are still hopelessly inaccurate. I would get a better opinion on that but the traffic in queries for better models on forum suggests there is still a significant problem even for the pros. :(

Hi

I find it nearly impossible to accurately simulate the exact and long term behavior of these transistors used in output stages. IMO, it takes a real circuit with real components to reliably predict the outcome. I still champion error corrected gate drive circuits for class AB mos-OPS. With adequate bias, the EC can mitigate the crossover, non-linear transconductance to a point where it is not a real issue using a circuit that is reliable and relatively not really that complex. Keeping the outputs from ever switching off and still be able to remain unconditionally stable is a noble cause, but is it worth the extra complexity? IOW, is the relative tiny amount of projected improvement over conventional EC worth it? One of these days I may mull over the idea of using a PIC as a bias controller, but I am not really convinced that it would be a significant improvement over EC.


Although I am interested in Edmond's approach, regarding higher frequency operation....:)
 
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True that conventional class A and power efficiency are not related, but it seems there is almost always a way to do it in the electronic world. One way I am thinking about is to use SMPS tracking supply to cascode the output devices, referenced to the output node. You would have to use opto-isolation for an on-line supply anyway so why could you not use the output node as the supply's secondary reference? Cascode helps to linearize the output transistors as well.:) I don't see this as a common solution though so there must be a reason. Any thoughts?
 
auto-bias

[snip]
I don't understand enough about Edmond's approach but it looks as if it would be possible to maintain a bias current through the output at all times. I'm not so confident that it can meet condition 1.
[snip]

The only thing it does is keeping the bias at an optimal level for class-AB operation, independent of temperature and, of course, without fiddling with a trim pot. That's all.
Since a class-AB OPS does produce more distortion (in particular odd harmonics) than 'class-heat', it is most likely that my auto-bias approach will not meet condition #1.

BTW, I'm afraid that what you are looking for simply doesn't exist.
The trouble is that we are dealing here with a real problem: i.e. a trouble you can't solve (that is, with today's components). Any time you try to adjust or correct the bias level of the OPS by manipulating the voltage of the bias generator, you create another source of distortion: the harmonic distortion of the bias generator itself. Given the nonlinear nature of OPS devices (BJTs or MOSFETs) implies that you have to adjust the bias voltage also in a nonlinear way in any attempt to make the OPS more linear.
 
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So how does Krell's stepped bias sit with that problem, other than by making far fewer but incremental changes to the bias? Presumably it just anticipates the power envelope and applies sufficient class A bias to keep beyond AB threshold and avoids further error.
 
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