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USB to I2S 384Khz - DSD Converter

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#1,487
did anyone attempt to replace regulators?
and to power XOs with external reg?
of course i'll add at least 2 shunt regs, at least for xos and chips. damn do i hate hacking around small smds :/
is a sch available only for regs and all those caps?
btw got my board intact.
 
#1,488
next667 said:
did anyone attempt to replace regulators?
and to power XOs with external reg?
of course i'll add at least 2 shunt regs, at least for xos and chips. damn do i hate hacking around small smds :/
is a sch available only for regs and all those caps?
Click to expand...
I wonder if you'll get any improvements by doing all that.....especially with all the new wiring you'll have floating around.....you might add more noise/problems than you're trying to take away.
 
#1,489
redrabbit said:
I wonder if you'll get any improvements by doing all that.....especially with all the new wiring you'll have floating around.....you might add more noise/problems than you're trying to take away.
Click to expand...

So true...

The only way to really improve the stuff is to use external oscillators on a well-made PCB, with attention to signal integrity stuff, with a good filtering of I2S coming out of Amanero's board, and with proper feed of the DAC with the MCLK (or whichever matters for jitter) signal.

The best place for these oscillators is a DAC board - this way you don't have too many ways to screw the things up.
 
#1,494
did anyone attempt to replace regulators?
and to power XOs with external reg?
of course i'll add at least 2 shunt regs, at least for xos and chips. damn do i hate hacking around small smds :/
is a sch available only for regs and all those caps?
btw got my board intact.
Click to expand...

FYI, I've soldered a couple of very low ESR electrolytics (3300 uF) across the two caps that filter the crystals as well as a low ESR electrolytic across the cap that filters the CPLD supply and the cap that is directly connected to the USB 5VDC supply (both 330uF).

Mounting the CPLD and USB electrolytics was slightly positively audible (slightly more calm & relaxed sound) whereas the caps across the crystals was really audible - much larger and more differentiated soundspace, more relaxed, better flow of details & nuances.

To reduce inductance etc. I've kept pin lengths of the electrolytics to an absolute minimum.

Greetings,

Jesper
 
#1,496
Whats the number of vregs currently? or better to rephrase,
what voltages are in play? 3.3v must be mandatory, so are both xos and smds powered by same reg?...i dont have dmm nearby, nor the board so..it might take me a while to measure everything.
taking the regs out,or at least usb power wont be a problem...but separating power leads to everything will be unless they are already separated :/
plus replacing at least one xo with a better one will be pita i believe 🙁

yaaaay just took a look at the photo of the boards...seems like ferrite beads to each xo, that makes job easier.
Atmel can operate from 1.6V to 3.6V with 1.8V core voltage, might be an overkill to use a seperate 1.8V reg, internal one should suffice. Xilinx 1.8v to 3.3v
- all according to datasheets.
I'm not sure of smaller smds namely V1 and U3,while Y1 should be an 12mHz USB clock
 
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