Just an FYI for other builders: when I tested with ECX10N20 and ECX10P20 and had the input of the amp open, the zobel resistor started smoking, indicating a high frequency oscillation. When I shorted the input, this did not happen, as well as when connecting a source.
I think this indicates that the IS is very sensitive to catching noise on the input resulting in this instability. The cap that @m0rten has added in parallel to the 100k resistor to ground can potentially lower or potentially eliminate the issue. I have not yet tested more because I changed to testing with verticals (with those I did not yet have this effect).
I think this indicates that the IS is very sensitive to catching noise on the input resulting in this instability. The cap that @m0rten has added in parallel to the 100k resistor to ground can potentially lower or potentially eliminate the issue. I have not yet tested more because I changed to testing with verticals (with those I did not yet have this effect).
Interesting. I wonder if you're picking up some RF signal. What wattage is your Zobel resistor?
I'll test today with my build. It does not have an input low pass filter cap.
On my version 2 of the design (build in progress), I added a 220pF input cap to ground. This was primarily to clean up the square wave response a bit.
I'll test today with my build. It does not have an input low pass filter cap.
On my version 2 of the design (build in progress), I added a 220pF input cap to ground. This was primarily to clean up the square wave response a bit.
Same as mine. I did a test on mine with the input open. No temp rise on the 10R resistor and no voltage across is. I ran it for a few minutes.
Sounds like you might be picking up RF which would be environment specific. Or could it be the gate to drain caps I have on my build attenuating it?
Sounds like you might be picking up RF which would be environment specific. Or could it be the gate to drain caps I have on my build attenuating it?
Miller cap is necessary. You have to put at least 33pf to overcome transistors’ inherent capacitance.
Not sure I understand your comment. As you taking about a cap for the VAS or something else? Assuming its the VAS, there are many ways to achieve stability other than a VAS miller cap.
If @mz543578854 is experiencing oscillation from RF interference, then a low pass filter on the input would be the first place to start. 1kR & 220pf should. After this, I'd look at the position of the input gate stopper resistor and make sure it is as close as possible to the JFET gate pins. Same for the gate stoppers on the MOSFETs.
If oscillation is still occurring, try adding a small cap between the gate and drain of the MOSFETS. Maybe start with 30p to 47p and see if it resolves it.
If @mz543578854 is experiencing oscillation from RF interference, then a low pass filter on the input would be the first place to start. 1kR & 220pf should. After this, I'd look at the position of the input gate stopper resistor and make sure it is as close as possible to the JFET gate pins. Same for the gate stoppers on the MOSFETs.
If oscillation is still occurring, try adding a small cap between the gate and drain of the MOSFETS. Maybe start with 30p to 47p and see if it resolves it.
This is a usual issue of amplifiers with fast MOSFET output stages. If this
https://www.diyaudio.com/community/attachments/ultra_cascode_v2_skjema-jpg.1365332/
is a current design schematics, I would have some comments:
- omit R5//C21 and short R1//C21 bottom nod to ground. Do not split the grounds with the 10R resistor, it only brings troubles.
- Q1 - Q4 might need gate stoppers resistors, like 47 - 100R.
- or put a resistor 47-100R between C2 and Q1/Q3 gate junction.
- C3 to be tuned according to step response measured on the real sample.
- output inductor should be used, something like 2uH//10R.
Always test the amplifier with open input like @mz543578854 did. During normal listening it may happen that the input cable is unintentionally pulled out and one has to prevent amplifier and speaker damage resulting from oscillations.
PMA: Thanks for your comments.
The schematics you refer to is a very unofficial one I made with good help from several clever people in this thread. I wanted to use some of my 2SJ73/2SK146 in this design, and that schematic was the result. Probably noone but me will build this... 🙂
But when I do, I will have your concerns in mind.
The schematics you refer to is a very unofficial one I made with good help from several clever people in this thread. I wanted to use some of my 2SJ73/2SK146 in this design, and that schematic was the result. Probably noone but me will build this... 🙂
But when I do, I will have your concerns in mind.
If it is only between amplifier signal ground and chassis/PE, then it is desirable. However, if the amplifier circuit has 2 grounds (signal and power) on the PCB, separated by 10R, then it is an issue as the ground current that flows from the signal source to the power GND via 10R creates voltage drop across this 10R which adds to the output signal, is amplified by amplifier gain and then is easily measurable in a spectrum as mains components rise. Take or leave, please, this is shared from long term experience with SE signal transfer. When possible, switch to balanced.
Hi all! At last I am starting to build this thing. First out is the HEXFET version withou cascode. Looks like this at the moment:
Do you have temperature compensation in your bias network? I had thermal runaway with HEXFETs, see somewhere above.
No, I don't! Would it help putting the TL431 on the heat sink? (Hope not, it is already soldered...)
Enough for today. A little worried about the runaway... Have to get the 1u caps and terminal blocks. Box is empty.
@m0rten , I was referring to thermal runaway of the bias current through the power MOSFETs. Lineup's original circuit was for lateral MOSFETs, like the Exicons. They are not as prone to thermal runaway as verticals are for class AB or class A amps.
I tried IRF verticals in my setup and couldn't get a stable bias, even with a BJT added for compensation (likely it did not have high enough hFE, but other projects have gotten higher prio currently, so I did not check further).
My approach at doing temp compensation for bias: https://www.diyaudio.com/community/...ut-and-lateral-mosfet-out.409798/post-7807704 (the BJT needs to be near to the MOSFETs on the heatsink).
My other experience: https://www.diyaudio.com/community/...ut-and-lateral-mosfet-out.409798/post-7846316
I tried IRF verticals in my setup and couldn't get a stable bias, even with a BJT added for compensation (likely it did not have high enough hFE, but other projects have gotten higher prio currently, so I did not check further).
My approach at doing temp compensation for bias: https://www.diyaudio.com/community/...ut-and-lateral-mosfet-out.409798/post-7807704 (the BJT needs to be near to the MOSFETs on the heatsink).
My other experience: https://www.diyaudio.com/community/...ut-and-lateral-mosfet-out.409798/post-7846316
Thank yoy, mz543578854
! I don't remember Lineup mentioning thermal runaway as an issue when he proposed the IRF version. Or maybe I didn't read carefully. Any thoughts about using the TL431.
! I don't remember Lineup mentioning thermal runaway as an issue when he proposed the IRF version. Or maybe I didn't read carefully. Any thoughts about using the TL431.
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