That project uses STM32F205 & USB3300 just as a USB HS front end to Xilinx FPGA which is responsible for I2S. So in essence Xilinx replaces SAI. Apparently async feedback is not implemented.
But the DoP code may be of interest.
But the DoP code may be of interest.
So it seems to be a timing issue related to external PHY. It might be useful to test sample rates that require HS (above 96k/24).Well, after many experiments I think the solution is found. Poll interval of data endpoint is encreased to 250 us (bInterval = 2), poll interval of feedback endpoint is encreased to 1 ms (bInterval = 4).
Yes, that page seems to be about asynchronous feedback. The source code you linked to does not implement it but maybe they have implemented it in later versions.Are you talking about it Feedback ?
IMO that project is a bit outdated and unnecessarily complicated as it uses 3 ICs which could be replaced by a single cheaper MCU (e.g. STM32F723).
It seems to me that in stm32f2xx_it.c in "void TIM3_IRQHandler(void)" it is...The source code you linked to does not implement it but maybe they have implemented it in later versions.
Ok. Odd way to implement feedback using timer interrupt as USB OTG firmware already provides an interrupt for that. As there is no code for isochronous IN incomplete interrupt or data IN interrupt I doubt the feedback scheme works in all cases.It seems to me that in stm32f2xx_it.c in "void TIM3_IRQHandler(void)" it is...
Have you tried this code? Have you used USB3300 in HS mode?
Yes, have tried 192 kHz / 24 bit stream. The device seems to receive and transmit without losses. 384 kHz / 24 bit stream is refused to be outputted by Winamp, going to have some tests later.It might be useful to test sample rates that require HS (above 96k/24).
Yes, I was looking for an example on HS. I found it and tried it.Have you tried this code? Have you used USB3300 in HS mode?
For now, I only connected usb3300 to stm32 and checked if it works in HS. It worked as described. I read the descriptor and checked supported fs.
Others in the future...
What MCU are you using? Are you using usb3300 and stm32 on a single board? Or usb3300 board and stm32 board connected by wires?I only connected usb3300 to stm32
STM32F205 one board, and second board usb3300. No wires only connectors...What MCU are you using? Are you using usb3300 and stm32 on a single board? Or usb3300 board and stm32 board connected by wires?
Well, my system (stm32f722vc + USB3300) is capable of achieving data throughput of about 900 bytes of audio data every 2 microframes and 4 bytes of feedback every 8 microframes under the following test conditions:
poll interval of data endpoint - 2 microframes
poll interval of feedback endpoint- 8 microframes
audio channel count - 6 (5.1 system)
sampling frequency - 192 kHz
bits per sample - 24 bits (in 3 bytes)
The next step is to make corrections to buffer filling / reading according to feedback.
poll interval of data endpoint - 2 microframes
poll interval of feedback endpoint- 8 microframes
audio channel count - 6 (5.1 system)
sampling frequency - 192 kHz
bits per sample - 24 bits (in 3 bytes)
[2]0004.1E44::12/24/2022-21:58:56.347 [USBAudio2] Format Type I PCM (0x00000001) SubSlotSize=3 BitsPerSample=24 ChannelCount=6
[2]0004.1E44::12/24/2022-21:58:56.347 [USBAudio2] Data Endpoint 0x01 Isochronous Asynchronous Data ActualMaxPacketSize=900 ActualPacketFrequency=4000/s (HS Endpoint)
[2]0004.1E44::12/24/2022-21:58:56.347 [USBAudio2] Feedback Endpoint 0x83 Isochronous None Feedback ActualMaxPacketSize=4 ActualPacketFrequency=1000/s (HS Endpoint)
[2]0004.1E44::12/24/2022-21:58:56.347 [USBAudio2] Supported sampling frequencies:
[2]0004.1E44::12/24/2022-21:58:56.347 [USBAudio2] min=192000 max=192000 res=0
....................................................................................
[0]36C4.0B98::12/24/2022-21:59:47.385 [USBAudio2]Cyclic buffer for PCM ch=6 sz=24/24 sr=192000 is: 2 x 34560 = 69120 bytes, 2 x 1 XFERs
[0]36C4.0B98::12/24/2022-21:59:47.385 [USBAudio2](0x01): DATA Isoch Buffers: BufferCount=3 PacketsPerBuffer=48 MillisecondsPerBuffer=12 IsochPacketsPerUsbFrame=4 BytesPerPacket=900
[0]36C4.0B98::12/24/2022-21:59:47.385 [USBAudio2](0x01): FEEDBACK Isoch Buffers: BufferCount=3 BytesPerPacket=4 PacketsPerBuffer=16 PacketFreq=1000 PollingInterval=8
....................................................................................
[0]0000.0000::12/24/2022-21:59:49.442 [USBAudio2]EP 0x01 OUT stream running at PCM ch=6 sz=24/24 sr=192000
[0]36C4.2C38::12/24/2022-21:59:49.442 [USBAudio2](OUT): packetNumber=201 flags=0x00000000 eosPacketLength=34560
[0]0000.0000::12/24/2022-21:59:49.452 [USBAudio2](0x01): COMPL OUT buf 2 CurrenLinearPosition=385920 EVENT
[3]36C4.2C38::12/24/2022-21:59:49.453 [USBAudio2](OUT): packetNumber=202 flags=0x00000000 eosPacketLength=34560
[0]0000.0000::12/24/2022-21:59:49.458 [USBAudio2]EP 0x83 FB stream running
[2]0004.1E44::12/24/2022-21:58:56.347 [USBAudio2] Data Endpoint 0x01 Isochronous Asynchronous Data ActualMaxPacketSize=900 ActualPacketFrequency=4000/s (HS Endpoint)
[2]0004.1E44::12/24/2022-21:58:56.347 [USBAudio2] Feedback Endpoint 0x83 Isochronous None Feedback ActualMaxPacketSize=4 ActualPacketFrequency=1000/s (HS Endpoint)
[2]0004.1E44::12/24/2022-21:58:56.347 [USBAudio2] Supported sampling frequencies:
[2]0004.1E44::12/24/2022-21:58:56.347 [USBAudio2] min=192000 max=192000 res=0
....................................................................................
[0]36C4.0B98::12/24/2022-21:59:47.385 [USBAudio2]Cyclic buffer for PCM ch=6 sz=24/24 sr=192000 is: 2 x 34560 = 69120 bytes, 2 x 1 XFERs
[0]36C4.0B98::12/24/2022-21:59:47.385 [USBAudio2](0x01): DATA Isoch Buffers: BufferCount=3 PacketsPerBuffer=48 MillisecondsPerBuffer=12 IsochPacketsPerUsbFrame=4 BytesPerPacket=900
[0]36C4.0B98::12/24/2022-21:59:47.385 [USBAudio2](0x01): FEEDBACK Isoch Buffers: BufferCount=3 BytesPerPacket=4 PacketsPerBuffer=16 PacketFreq=1000 PollingInterval=8
....................................................................................
[0]0000.0000::12/24/2022-21:59:49.442 [USBAudio2]EP 0x01 OUT stream running at PCM ch=6 sz=24/24 sr=192000
[0]36C4.2C38::12/24/2022-21:59:49.442 [USBAudio2](OUT): packetNumber=201 flags=0x00000000 eosPacketLength=34560
[0]0000.0000::12/24/2022-21:59:49.452 [USBAudio2](0x01): COMPL OUT buf 2 CurrenLinearPosition=385920 EVENT
[3]36C4.2C38::12/24/2022-21:59:49.453 [USBAudio2](OUT): packetNumber=202 flags=0x00000000 eosPacketLength=34560
[0]0000.0000::12/24/2022-21:59:49.458 [USBAudio2]EP 0x83 FB stream running
384 kHz / 24 bit stream is refused to be outputted by Winamp, going to have some tests later.
Try this.
Attachments
@EvSap : I guess this is due to holidays and other things to be done - but since I followed this discussion with great interest and there was heavy progress before christmas I wondered what´s your current status with the project?
Also, since there were hints to this, may I ask whether you have your codebase somewhere available on github? If not, will it be an open source example? I have no commercial background but as a hobbyist, I have some nucleos lying around and also some MICs, so that would enable me do experiments with some signal processing algorithms involvong more MICs than UAC1.0 can handle due to datarate limitations.
All the best,
Bernd
Also, since there were hints to this, may I ask whether you have your codebase somewhere available on github? If not, will it be an open source example? I have no commercial background but as a hobbyist, I have some nucleos lying around and also some MICs, so that would enable me do experiments with some signal processing algorithms involvong more MICs than UAC1.0 can handle due to datarate limitations.
All the best,
Bernd
This may be of interest to you:Also, since there were hints to this, may I ask whether you have your codebase somewhere available on github? If not, will it be an open source example? I have no commercial background but as a hobbyist, I have some nucleos lying around and also some MICs, so that would enable me do experiments with some signal processing algorithms involvong more MICs than UAC1.0 can handle due to datarate limitations.
https://www.diyaudio.com/community/threads/uac2-i2s-input-on-stm32f723e-disco.393702
Thanks! This calls for building a simple custom board around the F723 with a bunch of nice connectors😉 At least If I can get some parts despite component shortage.This may be of interest to you:
https://www.diyaudio.com/community/threads/uac2-i2s-input-on-stm32f723e-disco.393702
You could start with STM32F723E-DISCO board. On that board most of the GPIOs required for SAIs are available in pin headers. STM32F723 has 4 SAIs, each SAI has 2 channels and SAIs can be synchronized. So up to 8 channels are available.
Just so I get that right: The F723 in packages >=144 pins have an internal USB High Speed PHY and I assume that you make use of that in Firmware, so there is NO need for an external USB HS PHY, right?You could start with STM32F723E-DISCO board. On that board most of the GPIOs required for SAIs are available in pin headers. STM32F723 has 4 SAIs, each SAI has 2 channels and SAIs can be synchronized. So up to 8 channels are available.
Yes, internal USB HS PHY is used. STM32F723 MCUs are out-of-stock but DISCO board is available.
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