You're full of surprises tonight Gerhard
And here's thermal sch for TO-92 small signal BJTs.
I propose a toast to you Gerhard (just having beer in my hand). Successful build tonight.
Attachments
TSSA Basic - bias currents
Hi Gerhard
I recalculated bias currents according to valid configuration as it is now.
Some resistors and multiturn trimmers corrected, please check. Hopefully you are not so far that it is too late to make corrections. 🙄
Wish you're enjoying in the workshop
Hi Gerhard
I recalculated bias currents according to valid configuration as it is now.
Some resistors and multiturn trimmers corrected, please check. Hopefully you are not so far that it is too late to make corrections. 🙄
Wish you're enjoying in the workshop
Attachments
TO-220 MOSFET drivers will dissipate app. 1,5 W at 50 mA driver's bias current (1,1 V voltage drop on 22 ohm resistors), so be prepared they'll be hot on these heatsinks, but no problem, they'll last easily at 75°C for testing period hehe
I had to lower 2,2 k gate-source resistor to 1 k since we need at least 1,2 mA compound input bias current to operate properly. Input bias current will split evenly through both input BJT's, app. 0,6 mA through each BC550C/560C.
For pos/neg CCS current drive I put 2 k MT trimmer for easier setting of 2 mA through LED.
I had to lower 2,2 k gate-source resistor to 1 k since we need at least 1,2 mA compound input bias current to operate properly. Input bias current will split evenly through both input BJT's, app. 0,6 mA through each BC550C/560C.
For pos/neg CCS current drive I put 2 k MT trimmer for easier setting of 2 mA through LED.
They'll be OK, especially if you make high Idss (at Ugs=0) selection and take the highest ones. Choosing Idss=10-14 mA would be 10 times more than operating conditions, so enough room for good current regulation. 😉
Ohhh yeah, now I saw Y: 1,2-3 mA 😀
Nothing you can do, just take 3 mA ones
Ohhh yeah, now I saw Y: 1,2-3 mA 😀
Nothing you can do, just take 3 mA ones
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Again few words about MOSFET Darlington gate-source resistors:
- ideal conditions would be to have 1,5 mA input bias current (0,65 mA + 0,85 mA Sziklai pair) and 2,2 k resistor value (high OLG), so voltage drop 3,3 V
- Urg=Ug1+Ug2=2,2 V + 1,1 V=3,3 V looking to graphs of drivers and outputs it means in this case drain current will be in amps, that's probably too much, so I lowered Rgs to 1 k
- basic condition is that you don't go below 1,2 mA for Sziklai bias, that's the most important
- start with 1 kohm, than you will see (according to 50 mA driver's bias and the output bias) if you can higher the Rgs to 1,5 or 1,8 kohm and still maintain 1,2 mA
- both positive and negative side gate-source resistors must be the same value
- output bias/DC offset conditions are set only with CCS currents-trimmers
- ideal conditions would be to have 1,5 mA input bias current (0,65 mA + 0,85 mA Sziklai pair) and 2,2 k resistor value (high OLG), so voltage drop 3,3 V
- Urg=Ug1+Ug2=2,2 V + 1,1 V=3,3 V looking to graphs of drivers and outputs it means in this case drain current will be in amps, that's probably too much, so I lowered Rgs to 1 k
- basic condition is that you don't go below 1,2 mA for Sziklai bias, that's the most important
- start with 1 kohm, than you will see (according to 50 mA driver's bias and the output bias) if you can higher the Rgs to 1,5 or 1,8 kohm and still maintain 1,2 mA
- both positive and negative side gate-source resistors must be the same value
- output bias/DC offset conditions are set only with CCS currents-trimmers
Yes good idea, they parallel very well 😎
Resistors are now low inductance type 😀
OK, 3:0 AM