This board follows closely the TI EVM implementation as far as mode switches etc. Please refer to the section on PBTL in this document.
https://www.ti.com/lit/ug/slou441/slou441.pdf
Essentially you will want to set the DIP switches for M1=off and M2=on per:
And connect C and D input to GND.
This is the diagram for the other stereo BTL and SE quadrophonic modes:
https://www.ti.com/lit/ug/slou441/slou441.pdf
Essentially you will want to set the DIP switches for M1=off and M2=on per:
And connect C and D input to GND.
This is the diagram for the other stereo BTL and SE quadrophonic modes:
Hi X, sorry I don’t get the instructions for balanced input/BTL output: the table says to leave M1/2 open, your drawing at the bottom left says to close it?
Drawing is for stereo not mono (parallel) BTL. Go with the table. Please read the TI app note for other things needed for PBTL operation.
Can you show me a sketch or block diagram of the amp and how it is connected to audio source and output load etc? Also, detailed photos of the top and bottom side of the boards and how the audio signal is connected? If it works on stereo BTL, parallel BTL mode should be a simple setting away.
Input A and B should be balanced audio input and C and D should be grounded. But it is also important to see how the jumper 0ohm resistors are connected on the bottom side. A fault could be related to having the midpoint output touching ground?
Congrats on having it work in stereo BTL mode! That’s a big milestone and shows that your assembler has done a great job.
Input A and B should be balanced audio input and C and D should be grounded. But it is also important to see how the jumper 0ohm resistors are connected on the bottom side. A fault could be related to having the midpoint output touching ground?
Congrats on having it work in stereo BTL mode! That’s a big milestone and shows that your assembler has done a great job.
I have never had a request for configuring the board for PBTL. Reading the EVM document, there are two more jumpers that need to be set to connect the chip C and D inputs to GND via a 10k. This is accomplished as shown below at solder jumper positions W109 and W119 with a 0R jumper:
This is in addition to the M1 and M2 set as described above.
This is in addition to the M1 and M2 set as described above.
Here is the latest on configuring this amp for PBTL. I have tested this and there is an error on Texas Instruments EVM design for PBTL. Simple fix though.
1. Replace R109/119 with 0R jumper (TI error fix)
2. Connect Out A to Out C and Out B to Out D to bridge the outputs in parallel.
3. W109 and W119 will connect Input C and D to GND. Connect rest of jumpers as shown in photo above.
4. Set Cstart switch to ON, M1 = ON and M2 = OFF (they are opposite of table since reverse pull down logic).
5. Connect differential audio input to A and B Input.
6. Connect speaker out to A and B.
7. There is no need to ground INP C and D as the amp chip is directly grounded.
1. Replace R109/119 with 0R jumper (TI error fix)
2. Connect Out A to Out C and Out B to Out D to bridge the outputs in parallel.
3. W109 and W119 will connect Input C and D to GND. Connect rest of jumpers as shown in photo above.
4. Set Cstart switch to ON, M1 = ON and M2 = OFF (they are opposite of table since reverse pull down logic).
5. Connect differential audio input to A and B Input.
6. Connect speaker out to A and B.
7. There is no need to ground INP C and D as the amp chip is directly grounded.