Well, you may rely on "genue" parts from distris like Mouser/Digikey/Farnell/etc. as well. I.e. genue Panasonics/Nichicon etc. arent that bad. They offer several series to choose the right caps from. No need to buy (propably) "random fake/real/used/mislabeled" stuff from china. 🙂
For the rest, i go with you -> as much as needed to be in spec (+ design reserve, to meet the specs later on). I'm not into this "audiophile" thing.
From the datasheets, the Cap at GVDD is absolutely uncritical as it "only" supplies the gates. Using too much capacitance here may slow down the LDO regulation, to low/high ESR/ESL may let into stability issues regarding the ldo. (depends on the pass element)
So good filtering at AVCC is "more important" and the better choice. (Which also depends on the used power supply, i guess) The "highest improvemtent" at this point (filter AVCC) will probably be seen with a bad surrounding layout and a crappy psu. Instead of the 10R resistor you may also use a ferrite (like 600-1000R@1000Mhz). This needs to be measured..
Regards.
🙂
Aye. Apart from the oscon data sheets which I couldn't find anywhere, my DC coupling caps beat most others hands down on specs, even at $1.89 for 12 from other side of planet!
Their are some things positive with "audiophile" high spec bits and bobs, some anyway. But only buy if very cheap. Example would be recent 4.7uf polyester caps. EBay had a few types for a couple $ each. And not from China!
Would the gvdd cap really have ESR issues considering its in circuit with voltage divider resistors? Low ESL is recommended for other devices here.
Their are some things positive with "audiophile" high spec bits and bobs, some anyway. But only buy if very cheap. Example would be recent 4.7uf polyester caps. EBay had a few types for a couple $ each. And not from China!
Would the gvdd cap really have ESR issues considering its in circuit with voltage divider resistors? Low ESL is recommended for other devices here.
Just remove the c15 gvdd capacitor, don't use anything there and listen
btw remove 100k resistor too, then you have 20dB gain which will be an big improvement, and you'll have nothing connected to what TI calls a power output PO with tpa3116, not with all other chips they call it power output, but with 3116 they do.
btw remove 100k resistor too, then you have 20dB gain which will be an big improvement, and you'll have nothing connected to what TI calls a power output PO with tpa3116, not with all other chips they call it power output, but with 3116 they do.
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How big an improvement in sound quality is 20db gain setting over the 26db gain, and in what respect?
You may hookup a scope to GVCC and see what happens when C15 is remind
removed. I wouldn't run the app without. The cap is not that important for the gates but for the stability of the ldos control loop. Many ldos are only stable with the right capacitance to esr ratio - depends on the pass element. To be sure, a scope is a good start.
removed. I wouldn't run the app without. The cap is not that important for the gates but for the stability of the ldos control loop. Many ldos are only stable with the right capacitance to esr ratio - depends on the pass element. To be sure, a scope is a good start.
Scope is well out of my budget!
I personally wouldn't try removing cap.
With the capacitance to ESR ratio, wouldn't changing the resistors for different gain setting of either 20db or 36db disturb the ratio with same 1uf cap?
Connecting nothing to gvdd pin is within datasheet advise 🙂 PO they call it, not PBY, but capacitor doesn't hurt or improve sound on blueboard here, ~25mm away from chippin, no need to leave it off, (just tried it several hours this afternoon till now, switching on off few dozen times too)
See, I can't see that in 3116 datasheet or the evm sheet. Oh, do you mean by the gain settings values box saying gvdd OPEN for the 20db setting?
Something I noticed the other day in 3116 data sheet regarding the voltage divider confused me.
It states...
" It is recommended to limit the current consumption by using resistor voltage dividers for GAIN/SLV and PLIMIT of 100kΩ or more."
But the box showing values for gain settings states only 5.6K and OPEN for the 20db setting....
Its a confusing datasheet in places!
Something I noticed the other day in 3116 data sheet regarding the voltage divider confused me.
It states...
" It is recommended to limit the current consumption by using resistor voltage dividers for GAIN/SLV and PLIMIT of 100kΩ or more."
But the box showing values for gain settings states only 5.6K and OPEN for the 20db setting....
Its a confusing datasheet in places!
No, because it's not in series.
Beside this, current limiting means, that it is advised to use a voltage divider with 100k or more. Meant to save power in the dividers.
The gates drivers are the "load".
Irribeo, where the heck the data sheet advices no decoupling on GVDD?
There is no PBY definition in the datasheet. (And no sound improvement
..)
TI says:
So where exactly is your information from, that decoupling is not needed?
And please answer to Stanley's question:
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Well, the only conclusion in data sheet that nothing connects to gvdd is the gain settings box saying "open" for the 20db gain. But, the gvdd would still connect to the other resistor!
The only other part in there is about connecting gvdd straight to plimit only for full power. But that doesn't make clear whether or not the GND is still required!
I have considered the 20db gain, and not the 26db. As I don't use preamps, just a passive creek "preamp" for volume control, the calculations don't give me quite enough headroom for full power. The 32db gain gives far too much gain. So, even though 26db a smidging under full power for me, it will suffice.
I know full power is pretty damn loud for normal regular sized rooms, here in UK anyhow, but as I am using them with 1978 drivers I have large magnets and heavy paper cones to push. None of these modern two dollar modern Chinese composite speakers!! 😉
Very, very happy this morning as I have found UK supplier carrying full stock of the full range of Allen Bradley carbon composite resistors, and very good prices. No need to buy from USA seller now, so economically good, and a small contribution to balance a purchase or two from china. 🙂
The only other part in there is about connecting gvdd straight to plimit only for full power. But that doesn't make clear whether or not the GND is still required!
I have considered the 20db gain, and not the 26db. As I don't use preamps, just a passive creek "preamp" for volume control, the calculations don't give me quite enough headroom for full power. The 32db gain gives far too much gain. So, even though 26db a smidging under full power for me, it will suffice.
I know full power is pretty damn loud for normal regular sized rooms, here in UK anyhow, but as I am using them with 1978 drivers I have large magnets and heavy paper cones to push. None of these modern two dollar modern Chinese composite speakers!! 😉
Very, very happy this morning as I have found UK supplier carrying full stock of the full range of Allen Bradley carbon composite resistors, and very good prices. No need to buy from USA seller now, so economically good, and a small contribution to balance a purchase or two from china. 🙂
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Connecting "nothing" means:
Gain via resistor to GND (ie. 10-100k) - gives 20dB
PLimit to GVDD to disable current-limit (directly or via series resistor)
GVDD decoupling to GND via 1uF X5R/X7R (class2 ceramic), Not Y5V
Gain via resistor to GND (ie. 10-100k) - gives 20dB
PLimit to GVDD to disable current-limit (directly or via series resistor)
GVDD decoupling to GND via 1uF X5R/X7R (class2 ceramic), Not Y5V
Connecting "nothing" means:
Gain via resistor to GND (ie. 10-100k) - gives 20dB
PLimit to GVDD to disable current-limit (directly or via series resistor)
GVDD decoupling to GND via 1uF X5R/X7R (class2 ceramic), Not Y5V
Gain via resistor to GND (ie. 10-100k) - gives 20dB
PLimit to GVDD to disable current-limit (directly or via series resistor)
GVDD decoupling to GND via 1uF X5R/X7R (class2 ceramic), Not Y5V
Well whomever put together the datasheet didn't make very much clear did they!
If gvdd - 10-100k - GND sets 20db, they needn't have put they 5.6k at all, and then writing a couple pages on to use at least 100k for current limit wouldn't contradict itself.
..........
I've accidently stumbled onto something in the LC calculations/components while playing around. Gonna do some spice tests on component values, then I'm gonna have a few questions about the output lc circuit. 🙄
Even connecting Gain directly to GND would be fine but quiescent current might be increased then. (Haven't checked)
TI datasheet:
TAS5766m:
GVDD 8 27 PBY Internal Gate drive supply, connect 1uF to GND
(PBY=power bypass)
TPA3116d2
7 GVDD PO Internally generated gate voltage supply. Not to be used as a supply or connected to any component other than a 1 µF X7R ceramic decoupling capacitor and the PLIMIT and GAIN/SLV resistor dividers.
(PO=power output)
No other component was connected, no components were connected 😀
Sure TI could mean something else, however if they do they also write different datasheet. And yes voltage divider for gain is connected to gvdd too in 5766m datasheet.
Without decoupling switchingfrequency is on GVDD output pin, when decoupling capacitor is in place, inductor/capacitor outputfilterfrequency is dominant frequency on GVDD output pin.
TAS5766m:
GVDD 8 27 PBY Internal Gate drive supply, connect 1uF to GND
(PBY=power bypass)
TPA3116d2
7 GVDD PO Internally generated gate voltage supply. Not to be used as a supply or connected to any component other than a 1 µF X7R ceramic decoupling capacitor and the PLIMIT and GAIN/SLV resistor dividers.
(PO=power output)
No other component was connected, no components were connected 😀
Sure TI could mean something else, however if they do they also write different datasheet. And yes voltage divider for gain is connected to gvdd too in 5766m datasheet.
Without decoupling switchingfrequency is on GVDD output pin, when decoupling capacitor is in place, inductor/capacitor outputfilterfrequency is dominant frequency on GVDD output pin.
I don't see where they state that the cap can be left off? Both datasheets tell the same, they just name the pin meaning differently. As TI consists of different engineering departments, different people write the sheets.
They only say nothing else than....may be connected, they don't tell you to connect gain and plimit and 1uF. In the other datasheet they do say: connect 1uF. They indeed might mean the same, they just didn't print it, next to that is the label they attach to GVDD, PO versus PBY.
Gain pin isn't connected to GVDD for lowest, default gain setting. Just a resistor to GND, no need for 5.6k
Gain pin isn't connected to GVDD for lowest, default gain setting. Just a resistor to GND, no need for 5.6k
I was just quoting what the values are shown as in datasheet gain settings table. That's 5.6k R1 to GND, and open for R2 to gvdd. There's the 5.6K I quoted, on p14 of 41.
That does support "no resistor" between gain and gvdd, but still a CAPACITOR after Plimit/GND.
Then on p16 in the GVDD supply paragraph "it is recommended to limit the current consumption by using resistor voltage dividers for GAIN/SLV and PLIMIT of 100kΩ or more.
That's all I was pointing out was confusing.
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