The Well synchronized asynchronous FIFO buffer - Slaved I2S reclocker

#3 is certainly possible especially if RPi without proper casing is used. The shielding in StationPi seems inadequate.

But it should be fairly easy to verify this. Switch from RPi to a battery powered laptop and use async UAC2 with an USB-I2S board. Move laptop as far from FiFo & dac as possible. If you still hear noise the reason is probably not radiated RFI/EMI from host.

A bit of double sided copper clad PCB cut and soldered into a box would do a good job of attenuating the noise and spreading heat. If you want to go all out then grounded mu-metal then copper then steel with about 1/2" to 1" between boxes with plastic standoffs should give you a nice quiet system.
 
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For me the passage to Raspi4/Volumio 3 to was very beneficial,I won in quality Especially with regard to details in the medium,


Blitz I would have a piece of advice to give you,drop the USB and connect your SBC in I2S,But you need an I2S insulator,Maybe we will have identical results🙂
I took your advice and connect the same Rp4 one I2S isolated through Andreas Rp4 power and isolator board and on the other fifo input over USB and switched mpd output back and for...

To be honest, they for sure sound different, yes. But I2S is not the clear winner in this setup, its softer, a bit more greyish, less dynamic than USB...but very natural overall...

So I guess, its worth to look in detail what processing happens in between. I got Ndreas Isolator, you Ian on the I2S site vs. Usb processing nd i2s over usb board with its onboard isolator and reclocker.

I wonder what Ians Q7 would do...in front of Andreas Fifo...have you tried that already ?
 
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Thank you for the report Blitz, what system have you used, Picorplayer?
No, I'm waiting for the Q7, Canadian Post is very slow, But I suppose that my source will necessarily gain in quality, the Q7 will be used with Drixo 11.28MHz and 12.28MHz to improve the quality of the source clock Raspi4, and FIFOLite with 5.64MHz/6.14MHz Drixo Too, I'll keep you up-to-date.
 
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BTW ...i found it funny that Ian as THE long year designer of fifos in His Q7 manual talks about sound differences when switching clocks, psus etc...which is all not possible, right ? As fifos neutralize all of that...😉
You clearly do not understand how FIFOs work. They aim to neutralize jitter and noise coming from upstream devices (i.e. source). The clocks and psus used by the FIFO will of course have impact on the reclocking of audio stream for downstream devices.
 
Actually, IMHO one of the key features of Ian's FIFO is the ability to supply your own clock. Like tube rolling on a tube amp.
Your point certainly applies to PS for the Rpi. It does make a difference.
I even hear an improvement if I reboot Moode after it's been running for an extended time. That suggests something like a memory leak in the software that somehow changes the sound even though the stream will still be bit perfect identical. Again implies that interrupts on the Rpi create some kind of noise that gets into the system downstream.
 
Well, when you go deeply into the topic of OsNoise and Linux...like those guys of real-time trading systems or motor injection system do...you find very logical and clear explanations why what kind of IRQ-control (threaned or not) does what and what kind of trade offs you have for a jitterfree, deterministic dataprocessing. And you can measure those effects with RTLA/osnoise even...the noise, the latency...its as well quiet fascinating to read about what LInux in the backround does automatically to use any kind of memory available for caching etc...stuff you merely know about as even system tools like htop does not show that...so I am not surprised about your observations.

BTW...input cache in MPD works now beautifully, it loads the whole song (or many songs...depending on your memory size you give it) into ram and play, while buffer_before_play is depreciated.
 
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You want to be banned😊
No, i just encourage everyone to have a look into the q7 manual...Ian did a great job actually and made a table comparing his last three fifo designs in technical detail incl. The quality if the i2s signal they provide being q7 the first fifo which he says does not need the reclocker he developed for improving the i2s anymore.of the other fifos he developed..

..I bought the first version of his stuff for sabre and have half a dozen of his fifos, for rp, pulsar clocks, drixo, battery supplies etc..in the house...the idea that a fifo is a perfect device to cure signal quality is a too simple thought, otherwise we would not need a q7, the old generations would have been good enough.

And i am looking forward to your report when you feed andreas fifo/dac with rp4/q7...pretty sure that a fifo feeding a fifo will make a difference...even though intheory one fifo should be enough...i guess.
 
...the idea that a fifo is a perfect device to cure signal quality is a too simple thought, otherwise we would not need a q7, the old generations would have been good enough.
Nobody has claimed that FIFOs are perfect devices to cure signal quality. If the FIFO works decently source jitter and noise are eliminated so improving source gains little. If you can hear the source even with FIFO it just means that your FIFO is not working properly. And even in this case improving source does not help much as the imperfect FIFO will anyhow ruin the signal quality.

Feeding the audio stream through several FIFOs works only if all FIFOs are doing their job properly. In addition to separate FIFO devices most if not all async UAC2 USB-I2S boards buffer data internally so they act as FIFOs as well.
 
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Nobody has claimed that FIFOs are perfect devices to cure signal quality. If the FIFO works decently source jitter and noise are eliminated so improving source gains little. If you can hear the source even with FIFO it just means that your FIFO is not working properly. And even in this case improving source does not help much as the imperfect FIFO will anyhow ruin the signal quality.

Feeding the audio stream through several FIFOs works only if all FIFOs are doing their job properly. In addition to separate FIFO devices most if not all async UAC2 USB-I2S boards buffer data internally so they act as FIFOs as well.
I assert there is another possibility. For argument's sake, FIFO could be perfect. Everything arriving via its digital input could be isolated perfectly.
But the noise generated from the source computer is transmitted wirelessly. In that case one would see a difference if the source computer were enclosed in a faraday cage with all other aspects unchanged. This has all been supported by subjective observation and could be measured by someone so inclined and equipped. It is also far less expensive than stringing a series of redundant isolators/FIFOs all being bypassed by radio waves.
 
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I assert there is another possibility. For argument's sake, FIFO could be perfect. Everything arriving via its digital input could be isolated perfectly.
But the noise generated from the source computer is transmitted wirelessly. In that case one would see a difference if the source computer were enclosed in a faraday cage with all other aspects unchanged. This has all been supported by subjective observation and could be measured by someone so inclined and equipped. It is also far less expensive than stringing a series of redundant isolators/FIFOs all being bypassed by radio waves.
I agree. Leaving all devices (SBC, FIFOs, DACs, clocks) without casing on a breadboard (or similar) is asking for trouble in terms of EMI/RFI or mains noise. But even if the noise is transmitted wirelessly there are better ways to mitigate this than trying to optimize host OS.
 
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