rfbrw said:
Yes, there is no delay applied to DATA, DATA is just the signal from the I2S source. I'm talking about DATAL_P DATAL_N, DATAR_P, DATAR_N, the output signals. DATA goes into U16A
and U16B D-FFs and the outputs are delayed.
Hopefully we're not talking about two different schematics, we'll be here a while 😉
Bernhard said:
More than one 😀
After having some problems with the GAL listing (i've put that in the original post of the GAL design, fiforead was defined wrong) i was able to test the simplified definitions (quickly had a listen this morming). The GAL containes:
WSL := /WS
WSR := /WS
DATAR := WS * DATA + /WS * /SHIFT32
DATAL := WS * SHIFT32 + /WS * /SHIFT64
As you can see i did not use WSdelayed. WS is good enough to pinpoint the data. This can be done because the bit before the MSB of the data is not used and the 15 bits after the LSB are also unused. 16 bit data in 32 bit frame, remember.
If you are going to use this principle for a i2s format without spare bits (e.g. 7220 output), you cannot do this: the LSB is followed directly by the MSB of the next dataframe (you also need faster chip than 4517 and only two 16 bit shift registers. E.g. 4 times '166). In that case you need to make the signal WSdelayed and use that instead of WS (created with the one '74 flipflop).
Building the above with normal logic should be possible with
4517, inverter, two nands and a flipflop.
The only thing i did not check is if the flipflop timing is the same as the GAL flipflop timing. Referred to that in one earlier post in this thread.
The GAL story also continues, but not here. I'll put that in the other thread. 😱
Could somebody put this in a simulator?
And one last thingie:
NAND followed by NAND is the same as AND followed by OR.
Using NANDs should give a bit easier pcb routing.😉
Greetings,
NAND followed by NAND is the same as AND followed by OR.
Using NANDs should give a bit easier pcb routing.😉
Greetings,
Bernhard said:
Yes, at least one, though it probably won't meet the Till Criterion. Someone else will have to be the guinea-pig for guido's circuit.
ray.
and...
After a hard period at school, I came back to look how the balanced TDA1541A is going. Has someone tested Guido's or Rah's schematic?
After a hard period at school, I came back to look how the balanced TDA1541A is going. Has someone tested Guido's or Rah's schematic?
I know rah's circuit works having done a functional simulation and connected it to a TDA1541 but the debate moved on to impact of not performing correct two's comp. inversion.
http://www.diyaudio.com/forums/showthread.php?s=&threadid=34351&highlight=
http://www.diyaudio.com/forums/showthread.php?s=&threadid=34351&highlight=
- Status
- Not open for further replies.