TDA1540 - I2S to Offset Binary, no CPLD, no FPGA

@Nrik nice result! It deserves a full THT PCB :angel:

Yes but it is hard to find TH usb decoders.
Both the SA9277 and the PCM2704/5/6 are SMD.

Btw: the improvised level shifter ( the hovering IC) is a 74HCU04 hex unbuffered inverters. Use two inverters in series for each BCK, Data and LRCK, and the converted 3,3 Volt signals are close enough to 5 Volt to work. I tried a 40106 Schmidt trigger version to begin with, but it didn't work, and I think it is because it is too slow.
 
Yes but it is hard to find TH usb decoders.
Both the SA9277 and the PCM2704/5/6 are SMD.

Btw: the improvised level shifter ( the hovering IC) is a 74HCU04 hex unbuffered inverters. Use two inverters in series for each BCK, Data and LRCK, and the converted 3,3 Volt signals are close enough to 5 Volt to work. I tried a 40106 Schmidt trigger version to begin with, but it didn't work, and I think it is because it is too slow.

For level shifter You can use digital isolator ICs one side (USB PCB) supply is 3.3V other side to format converter is 5V supply.
 
There are few different types out. People mostly using all-in-one IC 4 x isolators.
BUT maybe it is better to employ single isolator for each digital line of the I2S (or other format) bus. Less interaction between the different frequencies and separate decoupling.
I used boot types. Somehow I think that ADuM1100 single isolator x 4 working good. And I will try soon IL710 soon. IL710 have enable pin option, so it can be used like switch to the different DAC inputs.
 
Gents - I'm working on my TDA1540 circuit, based on Miro's design posted earlier in this thread, and looking for a recommendation on what circuit to use for I2S to L/R. From what I read there are two options - the original posted by Miro and then another variant that uses stopped clock? Should I go with one over another?

Zoran - you also mentioned some about adding resistors to the DEM. Are those the OSC pins?

Thanks,
 
Gents - I'm working on my TDA1540 circuit, based on Miro's design posted earlier in this thread, and looking for a recommendation on what circuit to use for I2S to L/R. From what I read there are two options - the original posted by Miro and then another variant that uses stopped clock? Should I go with one over another?

Zoran - you also mentioned some about adding resistors to the DEM. Are those the OSC pins?

Thanks,

Yes Cosc is stay in place. I added 20K from each DEM osc pins to -18V power. Measured 0.2mA@20K each.
sorry about delay in answering :(
 
Hello guys, i've been searching for a circuit like this since 2018. I really wanted to make a TDA 1540 DAC, since it sounds really good, and i can't find a replacement for it.

My idea was to get one of those FPGA boards that makes the conversion, but i would like to make one myself.

My question is if someone tried to make it work with the SAA 7030. I know many people prefer to use the NOS mode, but i like it more with the SAA 7030.

If someone has the schematic to make it with SAA 7030 or knows if i could add it to this circuit it would be very helpful.
 
Hello guys, i've been searching for a circuit like this since 2018. I really wanted to make a TDA 1540 DAC, since it sounds really good, and i can't find a replacement for it.

My idea was to get one of those FPGA boards that makes the conversion, but i would like to make one myself.

My question is if someone tried to make it work with the SAA 7030. I know many people prefer to use the NOS mode, but i like it more with the SAA 7030.

If someone has the schematic to make it with SAA 7030 or knows if i could add it to this circuit it would be very helpful.

Hi
I tried this one from CDream.
TDA1540 - I2S to Offset Binary, no CPLD, no FPGA
And I can say that is working very good. You have an option with SAA7030 and without for NOS mode. With saa7030 You will need +12V additonal suply.