In March a friend asked me if I would like to design something simple
with the IRS2092. First I was not enthusiastic, because I had doubts that
it would work to achieve something better than the IRAUD7 and its clones.
Better means: Improved speaker control (==> post filter feedback), less noise and at least not worse distortion.
Nevertheless I had look into the topic.
My first attempts were fitting more or less to my expectations.
Good control of the filter and speaker, blameless step response, but harmonics in the -70db category all over the place. Ugh..
Also the gap between simulation and reality was to big for my taste.
Operating frequency and distortion figures did not fit sufficiently.
I digged deeper into the non documented weaknesses of the IRS2092.
Key points:
Transfer function of the OTA
Noise of the OTA
Jittery / ambitious flipping of the comparator
Internal delay times
After all this I updated my simulation model of the IRS2092 and soon came to
a changed structure, which behaves fine in simulation and reality.
Can't tell an official name for the structure.
With a good portion of phantasy we could call it a post filter feedback sigma delta modulator.
Above 60kHz F1(s) and F2(s) together are acting like an integrator for the 1Bit data stream coming from the half bridge...
In the mean time the results by far surpass the IRAUD7, but the complexity is very similar.
Step response is blameless with rise times below 5us, output noise is below 100uVrms, very low THD and nice dual tone behavior.
It is promising enough that I intend to go for a proper PCB.
Attached a scheme of the control structure and some measurements at 10W into 4R.
with the IRS2092. First I was not enthusiastic, because I had doubts that
it would work to achieve something better than the IRAUD7 and its clones.
Better means: Improved speaker control (==> post filter feedback), less noise and at least not worse distortion.
Nevertheless I had look into the topic.
My first attempts were fitting more or less to my expectations.
Good control of the filter and speaker, blameless step response, but harmonics in the -70db category all over the place. Ugh..
Also the gap between simulation and reality was to big for my taste.
Operating frequency and distortion figures did not fit sufficiently.
I digged deeper into the non documented weaknesses of the IRS2092.
Key points:
Transfer function of the OTA
Noise of the OTA
Jittery / ambitious flipping of the comparator
Internal delay times
After all this I updated my simulation model of the IRS2092 and soon came to
a changed structure, which behaves fine in simulation and reality.
Can't tell an official name for the structure.
With a good portion of phantasy we could call it a post filter feedback sigma delta modulator.
Above 60kHz F1(s) and F2(s) together are acting like an integrator for the 1Bit data stream coming from the half bridge...
In the mean time the results by far surpass the IRAUD7, but the complexity is very similar.
Step response is blameless with rise times below 5us, output noise is below 100uVrms, very low THD and nice dual tone behavior.
It is promising enough that I intend to go for a proper PCB.
Attached a scheme of the control structure and some measurements at 10W into 4R.
Attachments
Looks very interesting! 🙂 Especially post filter feed back idea! How is cross channel intermodulation avoided - or is there a master clock to drive e.g. 4 channels from same clock source?
I have build some time ago a simple 4 channel class D amplifier based on TDA8950j, but this chip has some really noticeable THD problems at about 5 - 7 kHz. So I decided to give IRS2092 a trial and bought some IRS2092 (DIP case) and couple of IRFI4019. But haven't had time to finish the project based on IRAUDAMP examples.
As a silent reader of your Class D projects I think you have the skills to get the best out of IRS2092, maybe more as the IRF test samples.
Keep on going.
BR Toni
P.S.: this was my project with central timing clock to avoid cross channel intermodulation products: 4 Channel BTL 300W 8R TDA8950j power Amplifier
I have build some time ago a simple 4 channel class D amplifier based on TDA8950j, but this chip has some really noticeable THD problems at about 5 - 7 kHz. So I decided to give IRS2092 a trial and bought some IRS2092 (DIP case) and couple of IRFI4019. But haven't had time to finish the project based on IRAUDAMP examples.
As a silent reader of your Class D projects I think you have the skills to get the best out of IRS2092, maybe more as the IRF test samples.
Keep on going.
BR Toni
P.S.: this was my project with central timing clock to avoid cross channel intermodulation products: 4 Channel BTL 300W 8R TDA8950j power Amplifier
It is not avoided.
But note: The intermodulation results in a product which is an amplitude modulated HF. Without amplitude demodulator it remains inaudible like the carriers themselves.
The only realistic way to make it audible would be to operate in bridged mode and use a very non linear tweeter acting as demodulator. ...not sure where, but somewhere here on DIYaudio I had a seperate thread for this - before I decided to give self oscilating topologies a chance.
Besides the AM products, poor implementations of self oscilating amplifiers may suffer from direct interference, typically caused by short comings in layout and/or wiring.
In real life I never had trouble with any of the above mechanisms.
Furtheron I am listening since half a year with pleasure to a self oscilating design without any issues.
So in most cases the simplicity of self oscilating designs is winning the race.
Especially for this project - which is intended to be simple.
😎 ...no matter if you are dissatisfied with the THD, but the build is pretty cool !
Very interesting ChocoHolic! I firmly believe that there is much untapped potential in the IRS2092...it has many excellent characteristics but is somewhat of a letdown when we start looking at the basic measurements. I am hoping you will detail this thread in the same manner as your other excellent threads...I'm very interested to know how the feedback characteristic is determined in order to adjust the parameters for a given application, even if this requires some first-principals discussion of feedback as applicable to self-oscillating Class D.
Do you mean it would be no problem using bridging with your new design - or should bridging strictly be avoided?
Would it be possible for you to share the ltspice files during your design process so we can learn more in depth?
THX!🙂
BR, Toni
Would it be possible for you to share the ltspice files during your design process so we can learn more in depth?
THX!🙂
BR, Toni
In fact what I see in reality more is that multiple self oscillating systems in close proximity have the strong tendency to auto sync. No matter if we are talking about SMPS or class D amps any other self oscillating power electronics.
Which specific properties do you see as main 'letdown' of the IRS2092?
Please be aware that in this particular thread I will be more reluctant in disclosing every detail. The combination of low complexity and high grade results is something which I would enjoy to see first on many benches of passionated DIY enthusiast before seeing it stolen and sold on ebay by the commercial copy cats.
So I am considering to provide kits of key components + BOM to hobbyists on a non profit basis. Depends on forum resonance.
The shown breadboard is a low power version using two paralleled IRFI4212, running from +/-40V and providing 250Wrms into 2R or bridged 500Wrms into 4R.
Originally I intended to stick to this, because the 100V MosFets have great body diodes, while higher voltage types with poor body diodes for sure will degrade the achievable distortion level to some extend.
But seeing the nice results it would be worth to dig into a version with two paralleled IRFI4020, running from +/-70V and delivering 400Wrms into 4R or bridged 800Wrms into 8R. Should be possible with still reasonably good results, even if not as extremely low THD like the small one.
Which version would be of higher interest?
You can expect trouble free operation also in bridged operation.
My last design, the 2kW one, also is fully self oscilating and runs fine in bridged mode. So I am not afraid of this.
Starting with the lower power version (bridged 500W@4R or 250W@8R) would be fine. Think I could reuse my IRFI4019 also for this version ...
Hopefully you are doing a mostly through hole design?
BR, Toni
Being a great fan of free oscillating, post-filter-fb class-d, I am looking forward to your design. Hau rein, Choco!😉
Using IRFI4019 instead of 4012:
In order to avoid increased idle losses and worsened idle EMI you will need to readjust DT and live with slightly higher distortion (some more advanced options for additional adjustment of the gate drive in order to reoptimize distortion...)
Also you will have to accept the fact that the current capability of the IRFI4019 is not sufficient for reliable operation into 2R (or bridged into 4R) at high levels ==> shut down expected when pushing hard.
Mostly pin through hole components:
Agreed. Some few SMD in key positions, but just few of them and nothing smaller than 0805.
IRS2092 is clearly planned to be DIP.
Noise:
The IRS2092 has a noisy OTA and a jittery flippy comparator.
Data sheet noise values translate to an equivalent input voltage noise density of 30nV/sqrt(Hz),
and my personal OTA measurements are pointing even to 50nV/sqrt(Hz).
Output noise measurements on the CDA-224 (somewhere between 200uVrms – 250uVrms) show that it is close to the theoretical limit , but still by factor 2-3 above my personal limit for amps, which are intended to be used in small living rooms with normal speakers (say 90..95db/W @ 1m).
Amps like the LD25 with even more gain and a single layer layout are no surprise, when showing 400uVrms-500uVrms output noise.
The only way to achieve low output noise (Max: 100uVrms. Goal: 70uVrms.) while using such a noisy input stage is to drive the input with large signals.
Already the OTA of the IRS2092 is generally too noisy to achieve good results directly from a 0db line level.
So the power amp of the LiteAmp is designed for input levels above 2Vrms for full output power. We could consider even higher input levels, until the point where the noise does not decrease anymore because of the flippy comparator....
An optional daughter board with a high end instrumentation amplifier gain stage (noninverting/inverting/symmetric) is part of the project. This daughter board also will give freedom to all DIYers for custom experiments with different OP amps or input caps or DC coupling.
In order to avoid increased idle losses and worsened idle EMI you will need to readjust DT and live with slightly higher distortion (some more advanced options for additional adjustment of the gate drive in order to reoptimize distortion...)
Also you will have to accept the fact that the current capability of the IRFI4019 is not sufficient for reliable operation into 2R (or bridged into 4R) at high levels ==> shut down expected when pushing hard.
Mostly pin through hole components:
Agreed. Some few SMD in key positions, but just few of them and nothing smaller than 0805.
IRS2092 is clearly planned to be DIP.
Noise:
The IRS2092 has a noisy OTA and a jittery flippy comparator.
Data sheet noise values translate to an equivalent input voltage noise density of 30nV/sqrt(Hz),
and my personal OTA measurements are pointing even to 50nV/sqrt(Hz).
Output noise measurements on the CDA-224 (somewhere between 200uVrms – 250uVrms) show that it is close to the theoretical limit , but still by factor 2-3 above my personal limit for amps, which are intended to be used in small living rooms with normal speakers (say 90..95db/W @ 1m).
Amps like the LD25 with even more gain and a single layer layout are no surprise, when showing 400uVrms-500uVrms output noise.
The only way to achieve low output noise (Max: 100uVrms. Goal: 70uVrms.) while using such a noisy input stage is to drive the input with large signals.
Already the OTA of the IRS2092 is generally too noisy to achieve good results directly from a 0db line level.
So the power amp of the LiteAmp is designed for input levels above 2Vrms for full output power. We could consider even higher input levels, until the point where the noise does not decrease anymore because of the flippy comparator....
An optional daughter board with a high end instrumentation amplifier gain stage (noninverting/inverting/symmetric) is part of the project. This daughter board also will give freedom to all DIYers for custom experiments with different OP amps or input caps or DC coupling.
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Think you mean IRFI4212 versus IRFI4019.
Yes - IRFI4019 has less ID but higher voltage. Current capability would be no problem if bridged into 8R. If distortion would be too high it is no problem for me to switch to IRFI4212...
Very good for my old eyes and fingers. Using some SMD is OK. In my TDA8950j project I also used some SMD capacitors to be as close to chip pins as possible.
A good idea to use opamp frontends for providing extra noisefree gain.
Mounting of daughter board: I have designed a discrete opamp and would like to be able to use them as they have very good distortion figure at high output levels. Of course these opamps need more space so it would be nice to know more of the connector sizes and mounting space/holes.
BR, Toni
Right, thanks for correction.
Also true that for 8R bridged two paralleled IRFI4019 are easily strong enough, lots of current headroom in fact for 8R.
I am confident that we will find a reasonable adjustment to keep distortion
good also with IRFI4019.
The design of the daughter board is still in the status of a preliminary idea so far.
It should be easy to fit with your needs.
Attached some visualisations.
Vertical mounted. Dual sided PCB with GND plane. The pin row will have lots of GND in order to achieve sort of an extended GND plane.
Signals/supplies: +/-40V & -GainInput & + GainInput & GainOutput.
GainInputs and GainOutput close together, so that a jumper can be placed if the mainboard is used without the optional gain stage.
Note: The OP amp supplies have to be derived from +/-40V (or even +/-70V), so we might need a heat sink back plate (1.5mm aluminium) behind the soldering side, not shown in the pictures.
Size of the daughter board not yet freezed, i.e. 35mmx55mm.
What do you think?
Attachments
Very good!
The size of the daughter board seems to be OK and has enough space for the instrumentation preamp. To add a heat sink back plate is a cool idea as we get a hf-shield too. Using a 2 row connector would give more stability. What do you think?
Maybe i need a bigger daughter board as my discrete opamps are huge but think would be no problem to design a daughter board using these 2520 sockets.
I have plenty of 15 and 22 µH inductors of type 1D23A-150M and 1D23A-220M (ice components / mouser). Are these inductors usable?
BR, Toni
Even if some relevant properties are not specified - these chokes are likely to be OK and I can put them as an option into the layout.
Inductance value:
Well, the design sweet spot for this amp is 12uH.
But the design is robust enough to work still fine with 15uH, even without any other change.
For blameless step response you will have to readjust one capacitor in the feedback network - can tell you the details with the BOM.
Some impact on distortion might also be there, but nothing catastrophic to be expected.
(When a classD amp is fine tuned to the point where all harmonics are in the sub -90db range, then every change will become visible in the distortion figures...)
Inductance value:
Well, the design sweet spot for this amp is 12uH.
But the design is robust enough to work still fine with 15uH, even without any other change.
For blameless step response you will have to readjust one capacitor in the feedback network - can tell you the details with the BOM.
Some impact on distortion might also be there, but nothing catastrophic to be expected.
(When a classD amp is fine tuned to the point where all harmonics are in the sub -90db range, then every change will become visible in the distortion figures...)
Cool!
I have also T106-2, T130-2 and T157-2 (red cores) and different sorts of CuL wire on stock. Which one are you using in your design?
My VP7723D audio analyser has 2 different 20kHz filters so it would be possible for me to tune to best performance...
T106-2 with 30 turns of 1mm CuL solid wire is what I am using on breadboard in the moment.
VP7723D:
Fantastic! Somebody with proper equipment 😎
On one hand my QA400 seems to be fine as well, but I am not sure if it is still reliable at such low distortion as the LiteAmps shows at 1W into 4R.
(Don't wonder about the rms values displayed, I have buffers and filters in front of the QA400 and always run the QA400 at levels which result in 700mVp, where it has its sweet spot.)
VP7723D:
Fantastic! Somebody with proper equipment 😎
On one hand my QA400 seems to be fine as well, but I am not sure if it is still reliable at such low distortion as the LiteAmps shows at 1W into 4R.
(Don't wonder about the rms values displayed, I have buffers and filters in front of the QA400 and always run the QA400 at levels which result in 700mVp, where it has its sweet spot.)
Attachments
The main issues I have with the IRS2092 are:
Far from state of the art residual noise levels. With a reasonable (typical) amount of gain the noise floor is sitting at -100dB. This can clearly be seen with the IR reference designs that have high-ish gain and low input impedance. In my own design I have done as you are proposing: lower the amplifier stage gain and drive it with a very low noise instrumentation amplifier. This does help, but the results are still far from "good" Class A/B.
Fairly high levels of THD when compared to some other Class D designs, such as those using drivers that allow for outboard, and much higher quality, OTA and comparator.
All IR reference designs use pre-filter feedback, and we are all well aware of the issues with that type on configuration. Post filter using the IRS2092 is of great interest to me, and I suspect to many here in the Class D forums. I'm really hoping that rather than lunging forward with the design specifics that we begin a discussion into self-oscillating feedback topologies. This is something not covered in any of the reference design material and I'm sure there are specific areas of feedback design that are of particular importance to Class D. If we discuss these things in detail as the design is fleshed out I believe there is less likelihood of the schematic copycats of sticking around!
You mean you see in your FFT a fuzzy -100db floor?!?!
CDA-224, which is a clone of the IRAUD7 is 20-30dB better, but still to noisy.
THD of the CDA-224 was IMHO OK. May be not perfect, but OK.
Have a look here in posting #42 (comparison of different dead times).
With the original dead time setting of 45ns the CDA-224 is not so bad and
close to the IR promises.
Can you show your measurements?
Well, the basics of loop control are like in the well known buck converter.
For fast regulation you either need an underlaying current mode regulation or a derivative portion in the global voltage loop gain structure.
In fact I have already disclosed in this forum a silly amount of post filter feedback informations for clocked and self oscilating designs as well.
The main difference between clocked and self oscilating is that for self oscilating we are using the same feedback loop to achieve the switching oscillation by any sort of phase shift delay oscilators, or hysteresis oscilators, or if you wish sigma delta....
In UcD the derivative portion is achieved by C_lead.
In my 2kW project I am feeding the derivative portion by two caps into an intermediate I/V conversion stage in order to avoid feeding the large HF amounts through the OP amp.
For an example of loop control see posting #375 here
http://www.diyaudio.com/forums/class-d/224052-systemd_2kw-any-interest-open-design-38.html
The simulation file in said posting contains a modeling of the feedback structure using an averaged modelling of the switching stage.
==> Loop control structure without carrier generation.
It covers everything you need for experimental learning of the pit falls of the loop control. And you can also modify it and feed the derivative portions through the OP amp...
But of course this experiments cannot substitute all the ugly things one has to learn in school book control theory. In order to achieve proper adjustments you need to know the linear control theory and some more headache about non linear effects like clipping of various stages and integrators running into nirvana...
Structure in the lite amp is again slightly different. Given by the structure of the chip I have to run the derivative portion through the poor OTA. And I added some guts for carrier shaping, the errors of the IRS2092 demand for a non fully triangular carrier to achieve best THD.
Some hints on distortion caused by feedback (especially critical for postfilter) and how to avoid/control it by carrier shaping you can find in the early postings of my SystemD MD thread.
http://www.diyaudio.com/forums/class-d/221498-system_d_md-class-d-like-chocolate.html
IRS2092 is a pretty ambivalent beast, some features close to catastrophic, some others absolutely great...
I do not intend to publish all the specific things I learned (and I am still learning) about the IRS2092.
For sure not before we have pictures/feedback of the first ten DIY builds of the Lite Amp in this thread. May be then, partially. May be never.