I will go for a IRFP240/IRFP9240 SlewMaster vertion. I do have a fine cabinet 400mm deep and sinks 150mm high. My intention is to "spread" the heat over the total length of the sinks (400mm). This means that some FETs have to be connected with short leaders to the PCB(I recieved PCB today). Power wil be +/-60 V. Five pairs. I have used this solution in a F5V3 100W amplifier. Comments on this in a Slewmaster are welcome.
Eivind Stillingen
Eivind Stillingen
V3 is already spread out. 5 pair outputs over 220mm only leaves you with
90mm (3 1/2") on each end. you are just 94mm longer than mine and
the same height. Should scale nice to the slightly higher Vfet bias (AS is).
The 12V lower rails than mine (72V) should also reduce wattage 10%.
So , the same 50W with 25% more extrusion - you'll be <40C.
OS
Symasui IPS
Has anyone built the Symasui IPS to the schematic in post 5204 "rumble" thread? The objective was to reduce the output offset settling time at power up. These mod's came somewhat out of the blue some time after the subject was discussed around post 5106. It may have escaped the attention of many as I can see no follow up discussion.
In addition to servo mod's, OS has reduced the IP LTP tail current from 3mA to 2mA and altered a few resistors, presumably to produce 4.7mA VAS current like the original circuit. The compensation caps have been changed also.
What I find is that 2mA tail current (2V across R8) gives 3.57mA VAS current as measured across one of two 1K divider resistors when the IPS is tested alone. I can produce the specified 4.7mA VAS current by raising the IP LTP tail current to 2.23mA which is getting near the limit of control on the pot.
Is the IP LTP current sacrosanct (3mA for one circuit and 2mA for the other) maybe for symetry of clipping? or can it be altered to give 4.7mA VAS current? Can the VAS current be left at 3.5mA and the biasing in the OPS be adjusted to compensate?
Are you there OS or Jason? any advice appreciated.
Keith
Has anyone built the Symasui IPS to the schematic in post 5204 "rumble" thread? The objective was to reduce the output offset settling time at power up. These mod's came somewhat out of the blue some time after the subject was discussed around post 5106. It may have escaped the attention of many as I can see no follow up discussion.
In addition to servo mod's, OS has reduced the IP LTP tail current from 3mA to 2mA and altered a few resistors, presumably to produce 4.7mA VAS current like the original circuit. The compensation caps have been changed also.
What I find is that 2mA tail current (2V across R8) gives 3.57mA VAS current as measured across one of two 1K divider resistors when the IPS is tested alone. I can produce the specified 4.7mA VAS current by raising the IP LTP tail current to 2.23mA which is getting near the limit of control on the pot.
Is the IP LTP current sacrosanct (3mA for one circuit and 2mA for the other) maybe for symetry of clipping? or can it be altered to give 4.7mA VAS current? Can the VAS current be left at 3.5mA and the biasing in the OPS be adjusted to compensate?
Are you there OS or Jason? any advice appreciated.
Keith
Hi Guys, do you remember who made a drawing to make make heatsink for drivers on slewmaster board?
I believe I was the first one to apply a supportive driver heat sink. I based mine on the attached pattern (this was for the v2 boards, the holes for the devices are just a little different on v3).
Do one of you also have drill drawing to the slewmaster "2P OPS" so I can mount the board on the heat sink?
Slewmaster 2p OPS soon to bee finish, heatsink for drivers also on it 's way☺
Setup will be together with Kypton C
Anyone use separate psu for input stage?
Setup will be together with Kypton C
Anyone use separate psu for input stage?
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I seem to remember OS saying that there was little to no value splitting the power supplies.
It is not a question of using a separate supply for the IPS because it is quieter or somehow "better" but purely to extract more output from the OPS with the available supply. When we get to the base drives of the final OP devices we have lost significant signal excursion capability due to the capacitance multipliers robbing a couple of volts plus the Vbe and Vce(sat) of the preceeding devices. It probably becomes a more viable option If you can come up with a way of "stacking" some additional volts on top of the main supplies. Maybe voltage doublers or a pair of floating supplies derived from low VA overwinds on the main torroid. Once stacked, the whole lot could be shunt regulated.
Sorry if I am misunderstanding your query or mentioning things you already know.
Keith
Yes both answers are right☺
My biggest worry was any heavy load could cause psu variations which could go back to inputstage☺
I test with out and with My extra psu to see how much i win.
Thanks
My biggest worry was any heavy load could cause psu variations which could go back to inputstage☺
I test with out and with My extra psu to see how much i win.
Thanks
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