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Selling Zhou Fang’s remaining stocks including some very rare Toshiba transistors

will try on BJT


You can use this pictures for your reference (from 2SC4793 datasheet):
1cf91dc17a10e4e9ec7ead337390c310.png


cd6171854bc17cda97a698550a195056.png
 
But it is not NP match (at least not by our definition) as the two types have different tranconductances at nominal current.


Hi, Patrick!

Let's go slightly deeper.

If we have the same transconductances of the different types then input capacitances would be differ. Based on this the high-frequency pole of the output stage will have different frequency when different shoulders are active.
This forcing us to have higher phase margin in overall design, design low feedback amps or even not to use complementary push-pull output stage in AB-class.
:)


Let me say straight about MOSFETs, we can be somewhere in between of the two cases:
1. The same transconductance with differ capacitances
2. The same capacitance with differ transconductances.

This is based on the inherent properties of the main carriers in the different types of the semiconductors.


May be we can talk about designing output stage and amplifier which have no demands for transistor matching and have no influence of discretes matching on its performance?
;)
What pole frequency of the output stage do you want, what amount of the feedback do you want and what frequency of the lowest pole do you want?
 
No high volume manufacturer can afford to do production with curve tracer matching.
So they don't use FETs; they use BJTs instead.

If you want perfect even harmonic cancellation, then using complementary devices alone is not sufficient.
One needs to go fully balanced circuits, preferrably pure Class A.

And there are some modern devices where the P and N devices have very similar capacitances, e.g.
FQP3N30 / FQP3P20

I do DIY audio for hobby, so I can jutisfy my indulgance for perfect matching as I want.
I am sure one can also design good amplifiers without matching.
But that is no fun for me.


Cheers,
Patrick
 
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Hi Patrick,

Thx for the discussion.

Do you mind sharing some data regarding different matching at different temp, if any? Quite interested to see some different results than mine. I was expecting for devices with the same type (N or P), they shall have quite similar temp behaviour, if they are from the same batch (which probably mean whey were processed at similar conditions) :) thx!

> it looks like matching temp does not really matter much

You obviously have not measure enough examples, even of those two types.

;)


Patrick
 
Hi Patrick,

Thanks for your comments :) Vgs and Gm are actually both matched well at 1A, although NP are not really full curve matched. I dont think we can get good NP matching as K2013/J313 case:)

If we zoomin the curves near 1A, the slopes of N and P MOSFET actually are very close (refer to the following curves), meaning Gm are similar. The Gm difference near 1A between N and P is only 5%, which I think it is quite decent :D

An externally hosted image should be here but it was not working when we last tested it.



> IRFP240/IRFP9240 matched quad Vgs matching at 1A

You can call this Vgs match at 1A.
But it is not NP match (at least not by our definition) as the two types have different tranconductances at nominal current.


Patrick
 
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Firstly I think we can agree that MOSFET characteristics is very much temperature dependent.
And this refers to the junction (silicon) temperature, not ambient or device case.

To have proper matching (and that means curve fitting by 6th order polynomials, not by eye on a curve),
one needs to ensure that the die (junction) is at the same temperature as the operating condition.
That in turn depends on the circuit or application.
For example, for a Class AB circuit, you will be operating at a much lower temperature (say 40 degC) and a much lower bias.
The conditions we use always match the application we have in mind.

Just setting the case temperature to the heatink temperature is also not sufficient.
This is becaue of the thermal resistance between die and case.
i.e. the junction temperature is higher than the case temperature in real operation.
So the die has also to be dissipating the right amount of heat to be accurate.
That is why our own matching equipment runs in continuous mode for 2 minutes before matching.
The computer actually checks for repeatability of successive meaurements before storing a set of readings.
We do not use single shot, as some low-cost "Curve Tracer" does.

Why would two devices matched at room temperature be different at operating conditions ?
That is because the Rthjc is determined by the silver epoxy layer that is between the die and the lead frame pad.
The epoxy volume typically varies by 10%, and hence also the thermal resistance between devices.
So the device with a thicker epoxy layer will have a higher junction temperature than another with a thinner layer under operating conditions.
But then you will not pick this up with single shot curve tracing.

Why so fanatic with matching ?
That depends on how much distotion cancellation you want to achieve.
See :
xen-audio
xen-audio
http://www.diyaudio.com/forums/pass-labs/121228-f5-power-amplifier-304.html#post4795279

Happy surfing...... :)


Patrick

PS: since the links were posted above, Nic borrowed our curve tracer for the F5X project only (2K1530/2SJ201).
He is using some other equipment for the rest.
 
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Firstly I think we can agree that MOSFET characteristics is very much temperature dependent.


Yes, of course!
But there are much more difference between transistor samples, this is based on the intrinsic properties of the semiconductor crystals.

So, choosing proper testing conditions and picking proper transistor samples we can achieve up to 20 dB benefit in THD. Of course, this can be done in relatively small feedback depth constructions. NFB schemes are even more sensitive, precise matching allow us go straight up to simulation results.

If you want perfect even harmonic cancellation, then using complementary devices alone is not sufficient.
One needs to go fully balanced circuits, preferrably pure Class A.


Yeah, you are right!
And there are another devices to be precisely match - input and feedback resistances.
ac468e796a9430fc5ef611097838783f.png

This directly affects CMRR performance and are very important.
 
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That is if you use negative feedback.
And those resistors are easy to get 0.1% without much cost.
That is obvious.

If you look thought the F5X thread, you will notice that we also match power (source) resistors (MPC74) tightly.
No use tightly matching power MOSFETs alone and then use 5% ource resistors.

You can also use a lot of NFB to achieve low distortion figures.
But then you might as well just use opamps, or chipamps.
So why bother.


Patrick
 
You can also use a lot of NFB to achieve low distortion figures.


Let's say, we can choose between using very linear stages which have distortion figures at level like -80-100 dB in the non-feedback manner.
Or we can use stage or components with something like -40-60 dB distortion and have moderate feedback around them with depth like 40-60 dB.
Or even we can use worst case stage with 1-5% distortion and have ~80 dB feedback depth around it.
And, oops, we can take very linear stage with precise matched components from first and put it inside huge 140-160 dB depth feedback loop...
:)

All of this depends on output stage pole frequency and developer decision.

Residual distortion of first three would be mostly the same, but, firstly, moderate feedback scheme would be preferred in mass-production and, secondly, would they all be the same for listening impressions?

So each approach can take its place in our mind. :)
 
Hi Patrick,

1. First of all, thanks for the in-depth comments on device matching. Appreciate you share your good knowledge with us and really admire the good measurement setup you have there. Great efforts! :worship:

2. For the polynomial fitting, I don’t think it is necessary, if the curve tracer or semiconductor analyzer has the function of multiple sampling for each data point it collects. The curves are mostly quite smooth and with low noise. Fitting is mostly necessary when an oscilloscope is used for measurement, as noise is relatively large for data from an oscilloscope. As far as I know, foundry engineers normally do not fit the IV data collect by an analyzer. Simply no point to do that, as you don’t have high level of noises there. :rolleyes:

3. For matching method, I performed multiple curve measurement for each device to heat up the devices, when I matched them at 65C. Though my method is not as intelligent as your computer-aided one, reaching the state in which die temp is higher than case temp can be achieved by a low cost curve tracer. :D However, from what I observed, single or multiple measurement do not lead to significant different matching results, as long as you use the same standard for each DUT.

4. Back to the room temp vs. high temp (operation condition) matching issue, I am afraid I did not find/see any data yet, not sure whether I missed out any plots in your posts. Although I was fascinated by the good knowledge you have on device matching, I still want to see some first-hand data to convince myself :D . Btw, the data of the epoxy volume variation of 10% is from any packaging company? Mind sharing the source? I would like to read more on this. Anyway, in order to convince myself, I did a little more measurement, in addition to what I did previously in which I compared device IV at room temp and 65C. This time, I measured some more matching quads (matching done at 65C) at room temp, to make my sample size larger. It is further confirmed that they have similar matching at room temp (two examples below). In addition, I did something more this time: I did some electrical stress on the devices, namely let the device run at high current for some time to heat them up, and measured the devices again (is this similar as what you did in your setup?). This kind of stress will more or less reach the condition that die temp is higher than case temp, you mentioned. It turns out the matching is still good, for both the N and PMOSFET (see figure 3 and 4). You may see that PMOS RT Vgsmax-Vgsmin=6mV, while after stress it is 7mV. NMOS-wise, RT 5mV vs stress 8mV. I would say there is some change of matching, but it is really very very small for the a few quads I measured this time. While, maybe my sample size is still not big enough, who knows. :confused:

An externally hosted image should be here but it was not working when we last tested it.

An externally hosted image should be here but it was not working when we last tested it.

An externally hosted image should be here but it was not working when we last tested it.

An externally hosted image should be here but it was not working when we last tested it.


4. The point of doing all the measurement is not to prove anyone is wrong or right, it is just an effort of finding the most effective way to do device matching. I appreciate your good efforts of matching devices at high temp with good computer-aided methodology. I also matched power MOSFET at high temp. I feel matching at high temp is really time consuming, which is why I would to explore possibility of room temp matching. :drink:

Again, thx for the good discussion.


Firstly I think we can agree that MOSFET characteristics is very much temperature dependent.
And this refers to the junction (silicon) temperature, not ambient or device case.

To have proper matching (and that means curve fitting by 6th order polynomials, not by eye on a curve),
one needs to ensure that the die (junction) is at the same temperature as the operating condition.
That in turn depends on the circuit or application.
For example, for a Class AB circuit, you will be operating at a much lower temperature (say 40 degC) and a much lower bias.
The conditions we use always match the application we have in mind.

Just setting the case temperature to the heatink temperature is also not sufficient.
This is becaue of the thermal resistance between die and case.
i.e. the junction temperature is higher than the case temperature in real operation.
So the die has also to be dissipating the right amount of heat to be accurate.
That is why our own matching equipment runs in continuous mode for 2 minutes before matching.
The computer actually checks for repeatability of successive meaurements before storing a set of readings.
We do not use single shot, as some low-cost "Curve Tracer" does.

Why would two devices matched at room temperature be different at operating conditions ?
That is because the Rthjc is determined by the silver epoxy layer that is between the die and the lead frame pad.
The epoxy volume typically varies by 10%, and hence also the thermal resistance between devices.
So the device with a thicker epoxy layer will have a higher junction temperature than another with a thinner layer under operating conditions.
But then you will not pick this up with single shot curve tracing.

Why so fanatic with matching ?
That depends on how much distotion cancellation you want to achieve.
See :
xen-audio
xen-audio
http://www.diyaudio.com/forums/pass-labs/121228-f5-power-amplifier-304.html#post4795279

Happy surfing...... :)


Patrick

PS: since the links were posted above, Nic borrowed our curve tracer for the F5X project only (2K1530/2SJ201).
He is using some other equipment for the rest.