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Roender's FC-100 Rev.1 Group-Buy

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#431
Rudi, received the transformer today - very nice. Thank you. Also, like many others have noticed, the shipping was much more than you estimated and charged us. I will send you a Paypal transfer to cover the difference. You do more than enough to be out of pocket on these GB's. Jean
 
#433
Gentlemen, please do not refund me any money!

My kitchen scales has shown me a weight of 480 gr incl. packaging, but the offical post-scales has shown 540gr 😱 !

I ordered a new kitchen-scales and will remember this expense and my mishap concerning the transformer's weight, when I do the next round
of group-buy for the beautiful FC-100 amplifier.

Best regards - Rudi_Ratlos
 
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#434
Shunt Transformer measurements

Rudi, completed the shunt PCBs and tested the transfo. Maybe should post this in build thread rather than GB anyway - results:
Transfo: 120 VAC in, Left:Out 1/2 39.4 VAC, 3/4 39.4 VAC
Right: Out 1/2 39.6 VAC, 3/4 39.6 VAC
PCB (No load or 2K Load doesn't seem to matter that much):
Left: Out + 37.2 VDC, - 37.3 VDC
Right: Out + 37.0 VDC, - 37.2 VDC

Note: Canadian Hydro is 120 VAC instead of 115 VAC
 

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#437
I have been asked to match 2SK170 - transistors for Mihail's FC-100.
The 1st image shows the LTSpice - model of my test-rig, the second image shows the result, when I measure the Vgs of a 2SK170 DUT.

LTSpice tells me to expect a value of about 80mV, but my DMM shows a value of 630mV.
The deviation should not be so big, and I think that the 2SK170-LTSpice model that I am using is "too rough".
Does anyone have a current LTSpice modell of a 2SK170BL?

Best regards - Rudi_Ratlos
 

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#439
the input jFETs operate over a range of current.
That range is determined by the level of input signal.
The two halves of the LTP should "amplify" the two halves of the signal they each see by the same amount.
That requires the jFETS to be matched over a range of currents.

Set up an LTP jig with the Sources connected together and the gates connected together.
Each drain connects to supply with 0.1%, or better, resistors.
Apply a fixed source current using the gate voltage as a trim. Measure the Vdiff at the drains. Sweep the source current and see how Vdiff varies. That is matching for use in an LTP.

This is quite different from selecting Idss for use in a B1.

I selected Idss in a matter of a dozen hours (600 devices).
Then, I matched the devices for use as LTP pairs. That took me hundreds of hours.
 
#440
AndrewT said:
the input jFETs operate over a range of current.
That range is determined by the level of input signal.
The two halves of the LTP should "amplify" the two halves of the signal they each see by the same amount.
That requires the jFETS to be matched over a range of currents.

Set up an LTP jig with the Sources connected together and the gates connected together.
Each drain connects to supply with 0.1%, or better, resistors.
Apply a fixed source current using the gate voltage as a trim. Measure the Vdiff at the drains. Sweep the source current and see how Vdiff varies. That is matching for use in an LTP.

This is quite different from selecting Idss for use in a B1.

I selected Idss in a matter of a dozen hours (600 devices).
Then, I matched the devices for use as LTP pairs. That took me hundreds of hours.
Click to expand...

I second that. It's not an easy job and took many hours to closely match jfets.
 
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