Thanks for the answers zfe - you are a rock!
So you say that the "100 seconds" starts again after a song change. Even if you just play a album by itself - song by song?
"recording of a square wave" I suppose this was Reference DAC Module - Discrete R-2R Sign Magnitude 24 bit 384 Khz #7334
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So you say that the "100 seconds" starts again after a song change. Even if you just play a album by itself - song by song?
"recording of a square wave" I suppose this was Reference DAC Module - Discrete R-2R Sign Magnitude 24 bit 384 Khz #7334
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Thanks a lot for doing this zfe!
Does does confirm my observations that the DAM1021 over- and undershoots over time within a rather broad range.
Since the i514's clock itself looks stable and within parameters of other crystals, in theory either
the accuracy of the measurements of the incoming clock or
the accuracy of the measurements of the DAM's build in clock or
the deviation caused by resetting the DAM's clock or
the step size of the corrections made by the DAM
would be the biggest contributor. Hope it is primarily the latter.
Can you quantify how much deviation would be acceptable for it to be transparent within the audible range vs a reference? More specifically, with two DACs summed and polarity inverted, how much deviation would be OK for the outputs to reasonably null (let's say 100dB or 120dB) below 20khz?
Does does confirm my observations that the DAM1021 over- and undershoots over time within a rather broad range.
Since the i514's clock itself looks stable and within parameters of other crystals, in theory either
the accuracy of the measurements of the incoming clock or
the accuracy of the measurements of the DAM's build in clock or
the deviation caused by resetting the DAM's clock or
the step size of the corrections made by the DAM
would be the biggest contributor. Hope it is primarily the latter.
Can you quantify how much deviation would be acceptable for it to be transparent within the audible range vs a reference? More specifically, with two DACs summed and polarity inverted, how much deviation would be OK for the outputs to reasonably null (let's say 100dB or 120dB) below 20khz?
I did experiment again with adding a rather big (1500 uf) polymer cap to the existing output decoupling cap of the 3.3V regulator. In my setup that regulator also feeds an RS-422 receiver for AES/EBU input.
The sound with the mod is a little more stable, better bass definition and less high frequency brittleness. The DAAD roundtrip file sounds noticeably closer to the unconverted original.
The sound with the mod is a little more stable, better bass definition and less high frequency brittleness. The DAAD roundtrip file sounds noticeably closer to the unconverted original.
zfe,
Frequency is the rate of change of phase. Close-in phase noise, phase noise in general, and jitter are all directly related to frequency.
For one thing though, it depends how we choose to measure frequency, say if we measure it continuously or if we measure it at discrete times, such as at alternate zero crossings. To conceptually illustrate, some phase noise or jitter might show up as speeding up of frequency over the first half of a cycle, then slowing down over the second half, so that the time period between every other zero crossing remains unchanged. A frequency counter might show no variation in frequency even though there was some variation in a continuous sense.
Regarding frequency counters, they usually either measure the period of a frequency if the frequency is low, or the number of zero crossings that occur over a fixed time period if the frequency is high. 'High' or 'low' frequency in this case meaning relative to the frequency of the clock in the frequency counter.
Frequency is the rate of change of phase. Close-in phase noise, phase noise in general, and jitter are all directly related to frequency.
For one thing though, it depends how we choose to measure frequency, say if we measure it continuously or if we measure it at discrete times, such as at alternate zero crossings. To conceptually illustrate, some phase noise or jitter might show up as speeding up of frequency over the first half of a cycle, then slowing down over the second half, so that the time period between every other zero crossing remains unchanged. A frequency counter might show no variation in frequency even though there was some variation in a continuous sense.
Regarding frequency counters, they usually either measure the period of a frequency if the frequency is low, or the number of zero crossings that occur over a fixed time period if the frequency is high. 'High' or 'low' frequency in this case meaning relative to the frequency of the clock in the frequency counter.
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If you play an whole album the player schould not stop data transmission between the tracks, otherwise you would have problems with most recordings of classical music.
I just made a measurement over a unlock-lock of the source (by stoping and resumeing playback). You see after unlock the DAM stops changeing frequency, after lock it goes wild again.
This recalled me a observation I made in the past: If you stop/restart playback more or less when the oscillation has a zero crossing, the osccilation seems to be less afterwards. I tried to confirm this with frequency measurements, its some trial and error, but something in this direction is visible after the initial big oscillation
The opposite works also, if you managed to get the oscillation less and stop/start when the oscillation is "far" avay from zero you can increase the oscilation again.
I will see is I can explore that more systematically - next weekend probably.
It demends what you want to investigate. For the frequency adjustment of the DAM the variations on level of a period of the masterclock are irelevant. The DAM measures frequency by counting periods (hundert thousends to millions). You only need to investigate the accumulated error over the gate time. So for this question a good counter and a stable source is the right tool.
TNT,
Looking at the measurements several posts ago, and how people where trying to interpret them, possibly to draw conclusions, some concern was felt that there appeared to be some problems. For one thing, a properly powered and implemented Crystek clock, allowed enough warm up time (3-days! No I'm not kidding) can perform well enough for a great measuring, great sounding several thousand dollar dac.
When measurements show one to be no better than average, IME there have to be problems somewhere. Maybe in the clock implementation, maybe with the measurement equipment accuracy, maybe with cables, connectors and or probes, and or maybe with experimenter technique. Maybe all of them. Therefore, I would take such measurements with a grain of salt until I figured out what is going on.
Hopefully, everyone once learned in a science class about experiments and measurements that error analysis is part of it. Otherwise, one risk's doing something that has the appearance of science, that people think is scientific, but really isn't so scientific at all (to paraphrase Jakob2).
The Black Hole......
EDIT: If it turns out that the clock implementation is the main problem with the measurement result, then what would be the point of measuring a faulty clock implementation? Just to show that poor implementation gives average results?
Looking at the measurements several posts ago, and how people where trying to interpret them, possibly to draw conclusions, some concern was felt that there appeared to be some problems. For one thing, a properly powered and implemented Crystek clock, allowed enough warm up time (3-days! No I'm not kidding) can perform well enough for a great measuring, great sounding several thousand dollar dac.
When measurements show one to be no better than average, IME there have to be problems somewhere. Maybe in the clock implementation, maybe with the measurement equipment accuracy, maybe with cables, connectors and or probes, and or maybe with experimenter technique. Maybe all of them. Therefore, I would take such measurements with a grain of salt until I figured out what is going on.
Hopefully, everyone once learned in a science class about experiments and measurements that error analysis is part of it. Otherwise, one risk's doing something that has the appearance of science, that people think is scientific, but really isn't so scientific at all (to paraphrase Jakob2).
The Black Hole......
EDIT: If it turns out that the clock implementation is the main problem with the measurement result, then what would be the point of measuring a faulty clock implementation? Just to show that poor implementation gives average results?
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I think by looking at the values of the measured entities, it should be clear to anybody that it is not jitter/phase noise that is measured. It should also stand clear that the zfe who performs the measurements has in his possession a much more accurate measurement system than the Crystec/NDK/Si as he can show a professional clock source to be way more stable. Now, there could be a problem with probing/connection to the DUT but I doubt it - such things do end up in varying osc frequency.
Personally I have no problem with these finding whatsoever. The seem legit, factual and appear to have been performed by someone who know what he is doing.
Why these are being made is to I suppose trying to convince the designer of the DAM DAC to make yet an effort to improve this fine piece of equipment. I suppose SQ wise we cant be sure to obtain a noticeable improvement but if it did it would sent this DAC to heaven. For others who have sync problems it would probably have a direct impact.
So Mk4, do you have an stability measurements of a Crystek within 2 hours of power on? If so, please present them with adequate meta data about the measurement and DUT. If not... well...
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Personally I have no problem with these finding whatsoever. The seem legit, factual and appear to have been performed by someone who know what he is doing.
Why these are being made is to I suppose trying to convince the designer of the DAM DAC to make yet an effort to improve this fine piece of equipment. I suppose SQ wise we cant be sure to obtain a noticeable improvement but if it did it would sent this DAC to heaven. For others who have sync problems it would probably have a direct impact.
So Mk4, do you have an stability measurements of a Crystek within 2 hours of power on? If so, please present them with adequate meta data about the measurement and DUT. If not... well...
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I'm surprised you post this question - it shows that you have missed to point of this activity and the problem at hand. Maybe if you can forget *phase noise* for one minute, you would get it. The long term stability of the incoming clock has an impact of the "unfortunate* design of the DAM PLL. Get it? Gheeze...
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The first experiment I would do with one of the dacs is to clock it with a good crystal clock and send it a digital input synchronous with that same clock. That will show the most effect better clocking could produce. Knowing that, all other approaches can be compared to what is known to be the best result possible (without further changes to the hardware design, that is 🙂 ).
Sorry but I don't believe the long term stability of the incoming clock has an impact on the sound, if anything, it is the short-term stability of the source that has an impact on the sound.
Try a rubidium oscillator on the source and then let me know.
The impact on the PLL is another thing, but about the PLL we have a different vision since I would never use a PLL.
If using a large FIFO with some delay is not acceptable I would slave the source to the DAC master clock.
So in your DA with no PLL, long term stability has no SQ impact - good for you. Maybe you should try to stay out of this discussion because here it has. Thanks for understanding.
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I've got several AD converters with great clocks and WC outputs, but the DAM1021 has no input for an external WC. Or rather, the firmware does not allow it. I asked Soeren if he could add an option for it but he declined.
I don't think the long term stability is an issue, it may rather be the case that the unnecessarily frequent and big adjustments affect the DAM1021 clock's performance.
Exactly, long term stability has no SQ impact, indeed we run our oscillators without an oven and we don't measure the Allan Deviation.
From a NDK paper (since you don't trust me):
"Frequency stability (the characteristic by which frequency does not change over an extended
period) is generally seen as an important property of crystal oscillators. However, audio devices
require short-term rather than long-term stability."
I don't know many state of the art DACs using a PLL, they use fixed oscillators.
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