Reference DAC Module - Discrete R-2R Sign Magnitude 24 bit 384 KHz

[soekris]

Interesting measurement, just reproduced here that there seem to be those very short pulses.

Let me investigate the fpga logic, and fix it.

 

[danny_66]

Amanero firmware

There are different firmwares for the Amanero.
1.074 for sync DAC and 1.080 for async DAC.
Which one is recommended ?

 

[normundss]

There is an Amanero firmware version that enables continuous bit clock, but for whatever reason that feature has not been added to the main release AFAIK. See post #2388. I use it myself, works fine with ASIO drivers.

 

[danny_66]

Thanks! I will select that option in the amanero oem_tool_115.

Some filter updates:
Paul has already adapted some filters to the new firmware.
They can be downloaded at moredamfilters

 

[soekris]

Just updated dam1021 firmware 0.99 (sorry still same version, check dates of files if need to), will fix those short pulse and should improve on clicks when changing sample rates or when bit clock stop or changes otherwise.

 

[zfe]

Just updated dam1021 firmware 0.99 (sorry still same version, check dates of files if need to), will fix those short pulse and should improve on clicks when changing sample rates or when bit clock stop or changes otherwise.

Up to now I was not able to produce any sample rate clicks. Very nice, undisturbed begin of playback. 🙂

 

[zfe]

Since the last firmware update I have a problem with Pauls latest filters. F7 does not load (I get F6 but with the FIR2 corrsponding to F7, i.e. F11).
Before the firmware update I did not had this problem. I reloaded the filters, did a power cycle .... no change.

F4


dam1021 uManager Rev 0.99  20150817  FPGA Rev 0.99  Press ? for help.

# filters

04 EQHQv5, 192.0 Khz, 0-30.00Khz +-0.00000025dB, 76.80Khz -165.70dB
08 EQHQv5, 384.0 Khz, 0-30.00Khz +-0.00000029dB, 307.20Khz -164.19dB
29 DC Blocking IIR, 384 Ksps, 2 Hz HP 1st order
30 Deemphasis IIR, 384 Ksps, 50/15 uS

# exit


F5


dam1021 uManager Rev 0.99  20150817  FPGA Rev 0.99  Press ? for help.

# filters

05 EQHQ_Apo, 192.0 Khz, 0-20.23Khz +-0.00000019dB, 86.40Khz -168.00dB
09 EQHQ_Apo, 384.0 Khz, 0-20.22Khz +-0.00000012dB, 297.60Khz -171.80dB
29 DC Blocking IIR, 384 Ksps, 2 Hz HP 1st order
30 Deemphasis IIR, 384 Ksps, 50/15 uS


# exit

F6


dam1021 uManager Rev 0.99  20150817  FPGA Rev 0.99  Press ? for help.

# filters

06 Low_Delay_v4, 192.0 Khz, 0-20.00Khz +-0.00000944dB, 76.80Khz -120.50dB
10 Low_Delay_v4, 384.0 Khz, 0-20.00Khz +-0.00000803dB, 313.44Khz -121.91dB
29 DC Blocking IIR, 384 Ksps, 2 Hz HP 1st order
30 Deemphasis IIR, 384 Ksps, 50/15 uS

# exit

F7


dam1021 uManager Rev 0.99  20150817  FPGA Rev 0.99  Press ? for help.

# filters

06 Low_Delay_v4, 192.0 Khz, 0-20.00Khz +-0.00000944dB, 76.80Khz -120.50dB
11 NewNOS, 384 Khz Samplerate Bypass
29 DC Blocking IIR, 384 Ksps, 2 Hz HP 1st order
30 Deemphasis IIR, 384 Ksps, 50/15 uS

 

[spikestabber]

Works here, did you remember to 'update' after uploading the full image?

# exit

F7


dam1021 uManager Rev 0.99 20150817 FPGA Rev 0.99 Press ? for help.

# filters

07 NewNOS, 44.1Khz Samplerate
11 NewNOS, 352 Khz Samplerate Bypass
29 DC Blocking IIR, 352.8 Ksps, 2 Hz HP 1st order
30 Deemphasis IIR, 352.8 Ksps, 50/15 uS

#

 

[zfe]

Works here, did you remember to 'update' after uploading the full image?
#

Yes. as the saple rate clicks are gone. 🙂
The issue is with the very latest firmware (the click fix version).

UPDATE:
I powered down everything, reinstalled firmware, reinstalled the filters, now it works.🙂🙂

 

[bambadoo]

Sample rate change clicks are almost gone. Still sometimes it clicks but not loud at all.
rpi2 - i2s - dam1021 (archphile distro)

 

[ylingf]

Not sure what I did wrong. Reinstalled latest firmware and filters multiple times, but could not change filter.

F4


dam1021 uManager Rev 0.99 20150814 FPGA Rev 0.99 Press ? for help.

# filters

04 Bypass FIR1, 352.8 Ksps
08 Linear Phase FIR2, 352.8 Ksps, 0-83 Khz -1 db, 209 Khz -100 db
29 DC Blocking IIR, 352.8 Ksps, 2 Hz HP 1st order
30 Deemphasis IIR, 352.8 Ksps, 50/15 uS

# exit

F5


dam1021 uManager Rev 0.99 20150814 FPGA Rev 0.99 Press ? for help.

# filters

04 Bypass FIR1, 352.8 Ksps
08 Linear Phase FIR2, 352.8 Ksps, 0-83 Khz -1 db, 209 Khz -100 db
29 DC Blocking IIR, 352.8 Ksps, 2 Hz HP 1st order
30 Deemphasis IIR, 352.8 Ksps, 50/15 uS

# exit

F6


dam1021 uManager Rev 0.99 20150814 FPGA Rev 0.99 Press ? for help.

# filters

04 Bypass FIR1, 352.8 Ksps
08 Linear Phase FIR2, 352.8 Ksps, 0-83 Khz -1 db, 209 Khz -100 db
29 DC Blocking IIR, 352.8 Ksps, 2 Hz HP 1st order
30 Deemphasis IIR, 352.8 Ksps, 50/15 uS

# exit

F7


dam1021 uManager Rev 0.99 20150814 FPGA Rev 0.99 Press ? for help.

# filters

04 Bypass FIR1, 352.8 Ksps
08 Linear Phase FIR2, 352.8 Ksps, 0-83 Khz -1 db, 209 Khz -100 db
29 DC Blocking IIR, 352.8 Ksps, 2 Hz HP 1st order
30 Deemphasis IIR, 352.8 Ksps, 50/15 uS

 

[soekris]

Is the dam1021 locked to something ? Don't remember, but it might need signal....

 

[ylingf]

same problems with both 8/14/2015 and 8/17/2015 firmware:

# update
uManager Firmware Update, are you sure ? Updated, resetting.

R0.99
I3
F5
V+00
I3
I0
L352


dam1021 uManager Rev 0.99 20150817 FPGA Rev 0.99 Press ? for help.

# exit

F4


dam1021 uManager Rev 0.99 20150817 FPGA Rev 0.99 Press ? for help.

# filters

04 Bypass FIR1, 352.8 Ksps
08 Linear Phase FIR2, 352.8 Ksps, 0-83 Khz -1 db, 209 Khz -100 db
29 DC Blocking IIR, 352.8 Ksps, 2 Hz HP 1st order
30 Deemphasis IIR, 352.8 Ksps, 50/15 uS

# exit

F5


dam1021 uManager Rev 0.99 20150817 FPGA Rev 0.99 Press ? for help.

# filters

04 Bypass FIR1, 352.8 Ksps
08 Linear Phase FIR2, 352.8 Ksps, 0-83 Khz -1 db, 209 Khz -100 db
29 DC Blocking IIR, 352.8 Ksps, 2 Hz HP 1st order
30 Deemphasis IIR, 352.8 Ksps, 50/15 uS

# exit

F6


dam1021 uManager Rev 0.99 20150817 FPGA Rev 0.99 Press ? for help.

# filters

04 Bypass FIR1, 352.8 Ksps
08 Linear Phase FIR2, 352.8 Ksps, 0-83 Khz -1 db, 209 Khz -100 db
29 DC Blocking IIR, 352.8 Ksps, 2 Hz HP 1st order
30 Deemphasis IIR, 352.8 Ksps, 50/15 uS

# exit

F7


dam1021 uManager Rev 0.99 20150817 FPGA Rev 0.99 Press ? for help.

# filters

04 Bypass FIR1, 352.8 Ksps
08 Linear Phase FIR2, 352.8 Ksps, 0-83 Khz -1 db, 209 Khz -100 db
29 DC Blocking IIR, 352.8 Ksps, 2 Hz HP 1st order
30 Deemphasis IIR, 352.8 Ksps, 50/15 uS

 

[zfe]

At least in the .txt file there are only differnt filters for 44.1 and 48 kHz. For the higher rates there is only the 04 filter. You are running the DAM with 352.8

 

[ylingf]

Never mind. Figured out. I am oversampling in JRiver to 352.8 that caused FIR1 to be bypassed. You are correct ZFE. Thanks,

 

[leehan]

normundss & Soren, THANK YOU guys! Locking and sample rate change clicks are gone!

 

[Priidik]

Can someone share the link for latest firmware?

 

[spikestabber]

Has anyone seen anything like this before?

If both the SPDIF Toslink and Coaxial interfaces are providing a signal at the same time, while the Coaxial input is used there is an occasional noise/distortion in a periodic pattern. If the Toslink input is selected there are no issues, it happens only on the Coaxial input while there is a Toslink signal present. Disabling the Toslink source makes the issue go away. Its almost as if its taking SPDIF clock from the Toslink interface for Coaxial.

My setup is an X-Fi sound card connected via Toslink (all PC audio except music, resamples everything to 96khz with hardware mixing), Beis AD24QS on Coaxial for vinyl and USB for music with Audacious having exclusive access to the Amanero.

This problem no longer exists in the latest releases, fyi.

 

[kenneth_obee]

After firmware v0.99 is installed, can I connect serial signal to J3 "ISO RXD IN", "ISO TXD OUT" and "ISO GND"? (with ISO +3.3V power supply)

What if I connect to both J10 and J3 for serial connection? would it be response to the two terminals?

 

[Dimdim]

Yes, the isolated serial port will work just fine with the connection that you mention. I tested it last night.

If you connect both serial ports, whatever you input (or output) to either serial port gets mirrored onto the other one. It is very convenient, especially if you are troubleshooting a microcontroller sending commands to one of the ports. 🙂