Try. If you have an equipment to do this.Haven't measured it yet.
I put a '374 on a little adapter board to reclock I2S. Then you just need one part and a cheap adapter board to mount it on.
Too bad Potato Semi seems to be no more, I used their 374. Their site still works, but they don't have an ebay store anymore.
Randy
Too bad Potato Semi seems to be no more, I used their 374. Their site still works, but they don't have an ebay store anymore.
Randy
I might have some '374 lying around (not Potato). Hmmm.I put a '374 on a little adapter board to reclock I2S. Then you just need one part and a cheap adapter board to mount it on.
Too bad Potato Semi seems to be no more, I used their 374. Their site still works, but they don't have an ebay store anymore.
About Potato ... grabbed two PO74GU04A from them a few years back. Not sure why; they are still unused. I think the impetus for buying them was from some thread here on DIYA ... anyone recall ?
Bevause of their noise cancelation logic:
http://www.potatosemi.com/potatosemiweb/ip.html
Did anybody ever test this?
http://www.potatosemi.com/potatosemiweb/ip.html
Did anybody ever test this?
I did notice that Potato also offers (offered ??) 74G74 flip-flops (soic):
http://www.potatosemi.com/potatosemiweb/datasheet/PO74G74A.pdf
Not sure how special these are?
http://www.potatosemi.com/potatosemiweb/datasheet/PO74G74A.pdf
Not sure how special these are?
The Potato parts are also very fast, 374 is 2.4ns propagation delay. 74 is even faster. But since they seem to be unobtanium these days not sure if it matters.
I can't find anyplace to buy their parts anymore.
Randy
I can't find anyplace to buy their parts anymore.
Randy
No AP555 in the house. Do have a Siglent mixed-domain scope.Try. If you have an equipment to do this.
Not sure looking at the eye pattern (DATA line) count as testing for "jitter".
No AP555 in the house.
APx555 cannot directly measure clock's jitter.
Do have a Siglent mixed-domain scope.
Also not possible.
I'm afraid, but the cost of equipment that can measure the jitter in the fs-ps range is a little bit more than APx555 and few Siglents together ...
Not sure looking at the eye pattern (DATA line) count as testing for "jitter".
You do not need to measure the jitter in the DATA line, only (depends of a DAC chip) WCLK's or MCLK's jitter can be important.
It's unclear whether you know what digital-audio jitter is.APx555 cannot directly measure clock's jitter.
Do have a Siglent mixed-domain scope.
Also not possible.
I'm afraid, but the cost of equipment that can measure the jitter in the fs-ps range is a little bit more than APx555 and few Siglents together ...
Not sure looking at the eye pattern (DATA line) count as testing for "jitter".
You do not need to measure the jitter in the DATA line, only (depends of a DAC chip) WCLK's or MCLK's jitter can be important.
Please be more specific in you replies. E.g., describe your own test lab and procedures. Photos would help.
Some references:
https://www.audiosciencereview.com/...audio-measurements-and-listening-tests.21115/
https://www.stereophile.com/content/jitterbuggin-measurements
https://www.stereophile.com/content/jitterbuggin-2020-measurements
https://www.stereophile.com/content/measurements-maps-precision
The discussion was about clock's jitter. None of the references you listed deal with that. They are about measuring deterministic jitter from DAC's output using J-test.
Please be more specific in you replies.
philipsmarantz, I talked about DIRECT measurements, your links are about INDIRECT jitter measurements (usually based on Julian Dunn method), so not of the jitter itself but it's results.
It should be understand the difference between the jitter in data transfer and jitter in D/A conversion. They are not the same, the first one may be much higher. For example, data jitter in USB Audio transmition can be 1 MILLI seconds for USB Full Speed, and 125 MICRO seconds for USB High Speed - these are the USB frame lengt, and the payload length is not constrant (with async. sinchronisation of isochronous transfer). And nothing happens! Because of a FIFO buffer before the D/A conversion.Jitter in D/A conversion is very important, because it increase the distortions. Because the time of the real conversion is not stable.
For some DACs (mostly the old ones), the moment of conversion is the edge of WCLK (LRCLK, LE) pulse.
BCLK jitter is not important, (until it is less then the half of BCLK period,otherwise the digital data will be corrupted), because the data is latched inside the DAC chip by WCLK.
For other DACs (the newer), WCLK, BCLK are used only to transfer the data to the chip. Real conversion is determined by MCLK signal. And no need to re-clock any signal, just provide low jitter MCLK to DAC.
So, it is possible to make re-clock of all signals (DATA, BCLK, WCLK), but usually this is not necessary (For example, in my AD1862 DAC I make re-clock only LE signal).
I wrote a small article 10 years ago. It was written not for professionals, so there a many simplifications in the description.
Sorry for my not perfect English.
Attachments
Yes, you are right.
These DAC used LE shifted by BCLK.
Usually, schematic designer should read datasheet (and understand what is written there).
These DAC used LE shifted by BCLK.
Usually, schematic designer should read datasheet (and understand what is written there).
Back in the day, Wadia tuned damping on all I2S lines for best SQ. It was empirical, not theoretical. They had some well educated and very measurement oriented engineers, but they listened too. Maybe some 2nd order effects are sometimes involved? Of course that would be much more subtle than what is going on here 🙂
altor:
Please keep in mind: you initiated the discussion about "jitter" earlier in this thread:
https://www.diyaudio.com/community/threads/re-clocking-i2s-simple-version.396381/post-7282936
... Whilst keeping in mind the title and theme of this thread: "re-clocking-i2s-simple-version"
Introducing complexity is not simplicity.
In any case:
I read you: “RadioHobby” magazine (Kiev, Ukraine) , #4/2013.
My query about measuring jitter remains open. You noted " APx555 cannot directly measure clock's jitter." and "DIRECT measurements".
So how does one DIRECT measure jitter? Say for audio ... any let's assume cost and resources are not an issue. That is: you are data scientist working for TI, Philips, AD, AKM, ESS , et. al, in the audio DAC department. What does the lab look like? Where are the resultant white papers showing how they did it and the results obtained? Etc.
Please keep in mind: you initiated the discussion about "jitter" earlier in this thread:
https://www.diyaudio.com/community/threads/re-clocking-i2s-simple-version.396381/post-7282936
... Whilst keeping in mind the title and theme of this thread: "re-clocking-i2s-simple-version"
Introducing complexity is not simplicity.
In any case:
I read you: “RadioHobby” magazine (Kiev, Ukraine) , #4/2013.
My query about measuring jitter remains open. You noted " APx555 cannot directly measure clock's jitter." and "DIRECT measurements".
So how does one DIRECT measure jitter? Say for audio ... any let's assume cost and resources are not an issue. That is: you are data scientist working for TI, Philips, AD, AKM, ESS , et. al, in the audio DAC department. What does the lab look like? Where are the resultant white papers showing how they did it and the results obtained? Etc.
Ditto.The discussion was about clock's jitter. None of the references you listed deal with that. They are about measuring deterministic jitter from DAC's output using J-test.
There is jitter and there is phase noise. They are two different ways of looking at the same thing. Most often for dacs, 'jitter' is defined separately from 'close-in phase noise.' That's because the two things tend to have different effects on reproduction accuracy. Some people believe that 'close-in phase noise' is the more important factor. But someone else might include close-in phase noise in what they mean when they say 'jitter.' IOW, sometimes the terms may be used a bit loosely. There are some applications notes out there we could find links for if anyone who doesn't already know all this stuff wants to understand the various issues with phase noise and jitter.
Or if someone doesn't want to study themselves, maybe better to listen to they guys who already know?
Or if someone doesn't want to study themselves, maybe better to listen to they guys who already know?
If you carefully look at my photos, you'll note with and w/o some in-line R's (49 ohm, metal film) -- that was my empirical approach. There are myriad other approaches. I think ARCAM (???) may have used an RC network on I2S is some early 90's CDPs.Back in the day, Wadia tuned damping on all I2S lines for best SQ. It was empirical, not theoretical. They had some well educated and very measurement oriented engineers, but they listened too. Maybe some 2nd order effects are sometimes involved?
Too bad the diyhifi.org forum is mostly (mysteriously) disappeared . Lot's of good, topical discussion there years ago.
For example - using very high frequency oscilloscope.So how does one DIRECT measure jitter?
https://teledynelecroy.com/doc/measuring-clock-jitter-tutorial
A fancy scope can measure jitter, but not close-in phase noise to near-SOA levels. That's a more specialized measurement. @altor, I know you already know 😉
Anyway, some reading material for any new students: https://www.skyworksinc.com/-/media...er-dictionary-and-measurement-guide-ebook.pdf
Anyway, some reading material for any new students: https://www.skyworksinc.com/-/media...er-dictionary-and-measurement-guide-ebook.pdf
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