• These commercial threads are for private transactions. diyAudio.com provides these forums for the convenience of our members, but makes no warranty nor assumes any responsibility. We do not vet any members, use of this facility is at your own risk. Customers can post any issues in those threads as long as it is done in a civil manner. All diyAudio rules about conduct apply and will be enforced.

PCB for the HAWK A18 amplifier (+ FETs if required)

Dear A19 builders,

I must say that I haven't build an A19 yet, still collecting parts and looking for some adequate heatsinks and housing.
It's quiet on this subject, is anyone else building an A19 or have finished one yet ?
Love to hear some comments. And some foto's please.

Hope to hear from you soon.

Jurjen from a wet Holland
 
That was an offer to replace the boards with errors. Not going to further discuss this.

Those who can build this amp will find a stunning performance.
Did an A/B test with F4, F5 and Aleph 30. This amp outperforms all in clarity, dark background and dynamics.

Thank you Hawk and John van der Sluis (rip)

The choice is up to you all.
 
IMG_2630.jpeg
 
  • Like
Reactions: 1 user
In bridgemode the total dissipation of the power fets is leading and I would not go beond 35W per fet. This gives a maximum of ~300W dissipation. The amplifier is unconditionaly stable for all loads down to 1 ohm. With 2 parallel fets I would not go above an output current of 14 amp's and I have fused my builds accordingly. In any case the power supply needs to be able to deliver the current for lower impedances.

I have used 600VA (18-0-18V) toroids and with that supply is is possible to deliver ~160W output power.

This amplifier topology would allow to put more fets in parallel like is used in other designs of Hawk and that would allow to address lreally low impedances.

Also in this design there are no devider resistors to spread the current over the number of parallel fets. Therefor I have matched on both Vgs and Gm parameters for optimum performance.
I use P and N transistors from the same wafer to optimize the input and the offset circuits.