Mezmerize DCB1 Building Thread

diyAudio Chief Moderator
Joined 2002
Paid Member
- Board test points: +10.6Vdc & -10.04Vdc
...
Do these look OK? I'm a little bummed since I really tried to get the LED strings matched

Thanks

Hi, the rails are always going to be bit different in a Mezmerize because its tricked out to do so. Seemed nicer with that. Not in the Hypnotize though where hot rod seemed not to account for it. If you nonetheless want to decide for yourself subjectively at a point look for the "leg trick" in this thread.
 
diyAudio Chief Moderator
Joined 2002
Paid Member
It brings symmetry in the currents run through both Vrefs if their tail Jfets are matched. Must be done with the g+s legs connected off board for that specific Jfet only as shown.

Mezmerize was conceived for low to moderate current in the Mosfets so that asymmetry in the refs seemed making it bit subjectively better. But its not keep making any appreciable difference if hot-rod is also done.
 
diyAudio Chief Moderator
Joined 2002
Paid Member
Its because builders ask from time to time why in the Mez no matter if I match my Leds so well the rails never seem to measure the same?. So I explained that the Vrefs are planned to run different currents and if they want to decide for themselves here is how to mod it be like the Hypno in that area. I don't remember to have had any conclusive feedback if they could tell which one way they preferred in the end though. Maybe bcs they almost always run it in higher main CCS current right from the start anyway.
 
0.03mVdc is so small I cannot measure that. And because it is so low there is no chance of hitting excessive leakage with a Vds of ~10Vds
But if I could, I would swap them just to see that it really did become -0.03mVdc.

What prevents that -1.7mVdc getting amplified before you hit your speaker with it?

Hey Andrew, I need to apologize: when I got home tonight I remeasured and realised my positive offset was +0.3mVdc, "0.03". Very silly of me. Sorry about that. At any rate, I swapped those jFETs and now I'm getting -0.9mVdc. Is it weird that it would go that far the other way? The other channel didn't change, still -1.7mVdc. So I guess I'm wondering if those offsets are OK or if I need to do more? I'd rather not; I'm getting pretty good at soldering but not the best "desolderer".
Thanks.
 
Disabled Account
Joined 2002
Its because builders ask from time to time why in the Mez no matter if I match my Leds so well the rails never seem to measure the same?. So I explained that the Vrefs are planned to run different currents and if they want to decide for themselves here is how to mod it be like the Hypno in that area. I don't remember to have had any conclusive feedback if they could tell which one way they preferred in the end though. Maybe bcs they almost always run it in higher main CCS current right from the start anyway.

I thought I saw someone doing that "leg trick" with one of the JFETs the signal is going through ;) I was baffled as it seemed he had done it in one channel only.

Yeah the rails measure slightly different and the LEDs burn a little dimmed in one rail but as long as offset is near 0 mV everything is OK isn't it ? So I don't need to change anything I hope ? I also use a 2 x 12 V 7VA transformer (no hot rodding for me) which I now read is too low in voltage for good working of the CCS ?!?!? I thought 2 x 12V was the recommended value years ago. Despite horror stories that it would be too light the transformer is not even lukewarm and it shouldn't with such low power demand. My Mez measures 73 mA per rail with 2 relays activated.... That is way below half of the current the transformer can deliver. I switched to FDA but kept my analog Mez as I liked it a lot. It works like a charm with the old info/values/schematic. Only muting is done the way it was done in the first revision of the PCB so relay in series of the signal. A technical inconvenience.

* IMHO one of the largest inconveniences of internet fora: after a while "new" or updated information is scattered around in various posts and tracking/organising that is near impossible. Every update in the first post would be a partial solution.
 
Last edited:
diyAudio Chief Moderator
Joined 2002
Paid Member
Your Mezmerize runs well on the standard original minimums. It was designed to can even run without sinks and on small transformer, hence the 12VAC not to get hot. The slight imbalance actually helps to get better offset when with non stellar Idss matching. Some ways mentioned in the course of the thread are just clarifications to users wanting to expand in a hotter theme. The base design has not changed. If you want to mod your relay for resting to ground in your first gen board you can do it by adding with wires the red lines seen in the attachment.
 

Attachments

  • T-Mod_Relay.png
    T-Mod_Relay.png
    8.9 KB · Views: 294
Relays and alternatives

I am interested in building the Mezmerize using the official board. Just 2 questions:
- If I only have 2 sources, can I just populate the board with 2 or 3 relays, or do I have to solder in all 7 relays?
- The relays listed in the BOM is no longer available and a search on this forum does not give available alternatives. Are there alternatives that I can get from RS Components perhaps?
 
I finished my Mezmerize yesterday and spent a few hours listening. I quite enjoy it, but am hesitant to put it into my system as it will be feeding an F5 with no DC speaker protection circuit.

Measurements taken with volume pot turned all the way up(20k ALPS RK27):

# Vout
9.91v
-9.70v

# Voltage across 68ohm resistors
1.473
-1.584v

# Current across 68ohm resistors
0.093mA
-0.088mA

# Output offset
Right: -03.5mV
Left: 00.9mV


## after switching right channel k170s

Right: -03.2mV
Left: -01.9mV


The above was taken after I did the 'leg trick' as well.

Perhaps I can/should better match (idss) the 4 audio jfet's?

As for output coupling caps, I have a few film caps on hand, and have ordered some k75's. I can order some WIMA mkp's if that is a better option as well.

Thank you!
Gable

edit: forgot to attach pictures
 

Attachments

  • IMG_3478.jpg
    IMG_3478.jpg
    701.7 KB · Views: 441
  • IMG_3479.jpg
    IMG_3479.jpg
    579.4 KB · Views: 424
Last edited:
what's the offset at the speaker terminals with the vol pot at three positions (highest , middle & lowest) and with the Source connected (both switched off and switched on).

The measurements are as follows:

# Source off, Lowest volume pot, offset @output connectors
Right: -03.7mV
Left: -00.8mV

# Source on, Lowest volume pot, offset @output connectors
Right: -03.8mV
Left: -00.8mV


# Source off, Middle volume pot, offset @output connectors
Right: -03.7mV
Left: -00.8mV

# Source on, Middle volume pot, offset @output connectors
Right: -03.8mV
Left: -00.9mv


# Source off, highest volume pot, offset @output connectors
Right: -03.7mV
Left: -00.8mV

# Source on, Highest volume pot, offset @output connectors
Right: -03.5mV
Left: -00.8mV


On the bench my source is an iPhone, so I connected the 3.5mm to RCA 'y' adapter to the input RCA chassis connectors. For the 'source on' I left the 3.5mm plugged into the phone, and 'source off' I simply unplugged it.

I may be mis-interpreting the test conditions you outlined in your reply.

hmm, now that I re-read your reply, I think you may have meant for me to connect the mez to my F5 and check the offset at the speaker binding posts. If that's correct, I'll set that up this afternoon, and resume the tests.

Thank you!
 
I have a question regarding negative/postive DC offset. According to AndrewT the negative offset indicates that the follower is running at less than Idss. However, if I put the lower Idss transistor as the current source (the follower is running at
<100% Idss) I get the positive offset. Given the gate sits at 0V this would mean a negative Vgs which is consistent with Idss of the follower <100%. So why the negative offset is suposed to reflect a desribale condition (the follower <100% Idss). What am I missing?
 
you have two jFETs in series.
select the lower Idss as the CCS.
That means the higher idss device is the Follower.
Run a jFET at less than Idss and you find that the Nch jFET requires a -ve Vgs.
This -ve Vgs is the -ve offset at the output.

Now swap them around so that the higher Idss is in the CCS position.
The upper device now passes a current that is higher than it's Idss. This requires a +ve Vgs
 
Last edited: