Well stated JCX, but duh! Of course, this has been my continuous argument over the weeks. How much current should I use to make the output stage class A most effectively? I have been told that I should not bother, because the circuit is virtually perfect and it won't help to do anything further.
It is CROSSOVER distortion. if it is generated by a change of gain around the zero crossing.
Thanks for the analysis, it tends to prove what I was concerned with in my residual test equipment measurements.
It is CROSSOVER distortion. if it is generated by a change of gain around the zero crossing.
Thanks for the analysis, it tends to prove what I was concerned with in my residual test equipment measurements.
Wow, thanks jcx for taking the time to do that. As I mentioned before our tools are about 15yr. beyond my own schematics and I would have to re-enter the whole thing by hand. The bootstrapping as positive feedback argument can make sense remembering that the amount is small and within normal BW does not cause the things normally associated with positive feedback. As I mentioned there was some care needed at 60MHz or so (this process only has ~400MHz ft).
John I have been thinking about your seventh and I think you could possibly look into nonlinear junction capacitances. Many IC op-amps share a pretty simple common structure and there might be something to learn there.
John I have been thinking about your seventh and I think you could possibly look into nonlinear junction capacitances. Many IC op-amps share a pretty simple common structure and there might be something to learn there.
Hi Andy - Scott's circuit is a lot of fun to explain, I see your argument but would like to point at a another way to look for loop gain is by opening the feedback loop and duplicating the load of the feedback element on the input and output of the gain stage to get the literal “open loop gain"
this shows the gain enhancement from the cancellation of Cc by the grounded Cn on the input of the mirror which explains the sensitivity of the measured loop gain enhancement to the near matching of Cn and Cc values which isn't easy to explain as just a simple negative feedback
I would agree that the negative feedback loop created by Cn is handy as it restores the global amplifier gain/phase to the compensated equivalent - but with added error correcting negative feedback/local gain around the output stage
Hi John
I assume your AD797 mc preamp application must be too heavily loaded by the low impedance of the feedback network to run in Class A with the 500uA bias (+/-1 mA max Class A output)?
again I'd prefer the external ef/buffer in the loop approach which for defined levels and loads internal to your amp could be as simple as a resistor biased single Q - possibly the Cn could enclose the ef as well?
also only global loop gain can linearize the tanh diff pair characterisic - by reducing the diff input V at frequencies where the gain loop is high - which is why I looked at the 2-pole comp in the earlier sim
this shows the gain enhancement from the cancellation of Cc by the grounded Cn on the input of the mirror which explains the sensitivity of the measured loop gain enhancement to the near matching of Cn and Cc values which isn't easy to explain as just a simple negative feedback
I would agree that the negative feedback loop created by Cn is handy as it restores the global amplifier gain/phase to the compensated equivalent - but with added error correcting negative feedback/local gain around the output stage
Hi John
I assume your AD797 mc preamp application must be too heavily loaded by the low impedance of the feedback network to run in Class A with the 500uA bias (+/-1 mA max Class A output)?
again I'd prefer the external ef/buffer in the loop approach which for defined levels and loads internal to your amp could be as simple as a resistor biased single Q - possibly the Cn could enclose the ef as well?
also only global loop gain can linearize the tanh diff pair characterisic - by reducing the diff input V at frequencies where the gain loop is high - which is why I looked at the 2-pole comp in the earlier sim
john curl said:
John, no DC current may help. Just consume as less as possible of output current to make this thingy happy. I personally would add some asymmetrical class A buffer after this simple nice thingy that is working because of modern IC technology.
traderbam said:
NUISANCE? Geez man, it causes insanity and mental problems!! At the very least get thee a good quality water filter for your drinking water - one that removes 99.9% of all heavy metals IMMEDIATELY!! Maybe this explains something about the Brits?? 😉
--- and on a serious note ---
Assuming for the moment that this is/was a discrete implementation, would this issue be reduced/eliminated by the use of increased driver current?
_-_-bear
bear said:
I don't go for symmetricity while an electricity is still cheap, but the Diamond Buffer perform the better the more symmetrical it is. And it was born to be made on a single grain of a sand, for symmetry and thermal tracking.
Ok, Anatoly... it's an "academic question".
Assume the "grain of sand" is bigger, fatter and handles more current, if that makes you feel yummy?
_-_-bear
Assume the "grain of sand" is bigger, fatter and handles more current, if that makes you feel yummy?
_-_-bear
JCX, let us be realistic. We HAVE to load down a low noise IC in order to keep its low noise performance. Without realistic load and feedback resistors, all is lost!. This is the problem with a 'starved' output stage. It is the same with the 1028. The current budget is completely in the input stages, and little is left for the output stage, but then who hears or cares about small amounts of higher order odd harmonic distortion anyway? Especially when it is buried by lots of feedback and the noise of the test equipment attempting to measure it?
I would ONLY use a current sourced fet as a current source on the load. The question has always been: WHAT CURRENT IS OPTIMUM?
I would ONLY use a current sourced fet as a current source on the load. The question has always been: WHAT CURRENT IS OPTIMUM?
bear you are right, the crossover hat has a functional form that is not all that hard to compute, thought I would leave it to MathCad these days. There is a lot to gain in increasing the standing current, but there is a power budget for an IC.
The more I think about it the more I like the "a little" positive feedback description. Another approach which is one technique we use in some ADSL drivers is to brute force it and make the output stage a little closed-loop buffer (CF). This is then the 100% feedback approach.
The limiting case on this is a Sziklai pair output stage, and AFAIK my AD8390 holds the record for rate/reach on ADSL2+ at only 2.5mA TOTAL bias per side. That's the amplifier doing -70dB multitone distortion @2.2MHz and 400mA/50 Ohms.
jcx is a pioneer in applying xDSL drivers to headphones, really nice stuff.
The more I think about it the more I like the "a little" positive feedback description. Another approach which is one technique we use in some ADSL drivers is to brute force it and make the output stage a little closed-loop buffer (CF). This is then the 100% feedback approach.
The limiting case on this is a Sziklai pair output stage, and AFAIK my AD8390 holds the record for rate/reach on ADSL2+ at only 2.5mA TOTAL bias per side. That's the amplifier doing -70dB multitone distortion @2.2MHz and 400mA/50 Ohms.
jcx is a pioneer in applying xDSL drivers to headphones, really nice stuff.
john curl said:
The question has always been: WHY DON'T YOU MEASURE IT YOURSELF AND LET US KNOW, instead of whining about not having the proper information. If you would get the flat answer "6mA" would you blindly trust this or would you still experiment?
So build yourself a variable current source with a JFET and a multiturn resistor and spend an hour measuring the effect. You seem to have everything that is required at hand.
dimitri said:
Absolutely agreed. But for whatever reasons, some people still believe this approach will decrease the "7th" and perhaps the bad cholesterol as well.
Syn08, what do you think that I was doing, yesterday afternoon? DUH! I gave up when I ran into some external shielding problems. Still, it would be nice to get the straight 'skinny' from the designer, so that I don't stray too far, for some hidden reason.
john curl said:
If you can't reliable measure low levels of the "7th" then how do you know it's a problem?
And for building a RIAA preamp, where the vinyl has at least 5 orders of magnitude higher distortions? What about the distortions in your famous, open loop, JFET input, RIAA preamp?
For instrumentation purposes, first make sure you have an ultra low distortion generator, fix your shielding and any other artifacts sources, spend $100 on a 1212M sound card, use it to characterize the generator, then you may think improving your distortion analyzer, having the generator as reference and the HP3562A as spectrum analyzer.
This is what you should do, unless you prefer picking on people, or looking for a sales pitch for your opamp based preamp.
I like picking on people, especially people, whom I have known for 25 years or more. You don't fully qualify yet, but keep at it and I will make an exception.
PMA, I once described YOUR distortion as "hitting a frying pan along with the orchestra", published in Mar. 1980, p. 58, in an interview in 'The Absolute Sound'
I also said on the same page that 'it' "is even worse than the 3rd, 5th and even 7th harmonic".
PMA, I once described YOUR distortion as "hitting a frying pan along with the orchestra", published in Mar. 1980, p. 58, in an interview in 'The Absolute Sound'
I also said on the same page that 'it' "is even worse than the 3rd, 5th and even 7th harmonic".
PMA said:
I am sure everybody will appreciate an example (graphic, citation, link, whatever, except for empty descriptive words) that illustrates "non-harmonic, but signal correlated distortion".
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