The hiss of the magnetic tapes was a ground on witch it was easy to build a mix. When Digital appeared, many sound engineers where lost, dizzy, like Felix Baumgartner jumping from his basket into nowhere, eyes stuck on the meters. Sometimes, it is more comfortable to add a little hiss in his system, a breath of life.I'll admit trying for 20b performance on playback is probably a better REAL life target if it facilitates solving more audible problems
well there are scientific standards for demonstrating that the ear is hearing the difference...
slow the pulse edge to the zip cord, and the lumped model "features" (green traces) are reduced:
Those events on the waveform are taking place way above our hearing range. Do you think that makes a difference in the sound that we can hear? Just asking BTW - not a challenge!
I'd be worried about toasting the input pair at that drive level. The DUT is clearly no longer able to keep the negative input node close to the positive input. So I'd suspect sending one of the E/B junctions into avalanche.
jn -
Don't opamps normally have back-to-back diodes to prevent too much differential input voltage though? So its physically not possible (without blowing these up) to yank the two inputs far enough apart for zener or avalanche to occur. Or am I missing something?
Nice work Pavel, correlates very well with what Ed Simon noticed and what my ears have told me 🙂 Given what Walt Jung found in his regs, I surmise that the AD797 would also fare badly in this test?
You guys have me confused, I thought PMA was talking about permanent offset from input damage, no modern amplifiers I know of suffer from this. DC offset from residual slew asymmetry for 20V p-p square waves may or may not have any relevance to audio.
To people who will parse his paper.
What's there to parse?, Nelson is one of the only people here that will face up to the fact that MAYBE the distortions of simple no feedback circuits cause user preference.
Oh I took it Pavel's showing RF-induced offset shift.
I'll go back and look.
I have found only 1 failure mechanism in the 2SK1058.
Failure of the gate to source 'protection' zener .....
If a high enough ' gate stopper ' resistance is not used
the zener will short with high enough transient .....
Protecting the device proper but at the same time making
it useless ..............
Failure of the gate to source 'protection' zener .....
If a high enough ' gate stopper ' resistance is not used
the zener will short with high enough transient .....
Protecting the device proper but at the same time making
it useless ..............
24 bits are there for better definition of low level signals. Not a signal/noise target.
I'd say the opposite. If your signal is dithered (as is normal practice), all that does is get you a lower noise floor.
Niggle or impugn then, Scott.
Interesting you say this, Nelson's paper only reinforces the opinion that most cable issues are solved by simple lumped element analysis. He does not addess a single exotic dielectric, undiscovered physics issue at all.
Exotic cables sometimes push the R/L/C tradeoffs way over in one direction or the other. The result is easily measured 1 or even more dB response differences that are proven to be audible.
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You misinterpreted my answer, SY. What i I wanted to say was if we (sound engineers) asked for more bits in pro recorders and desks, it was not to increase the signal noise ratio, it was to get better definition of low level signals (more bits for them)...I'd say the opposite. If your signal is dithered (as is normal practice), all that does is get you a lower noise floor.
Even at 16bits, we have more noises (micro hisses, instrument amplifiers noises, room noises etc...) than the bottom, and those noises are added by the re-recordings.
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"I used a GOOD dual wirewound pot that I connected between a Vendetta Research phono stage and the power amp, or I plugged in a vacuum tube FM tuner into the wirewound pot, instead. Why? Well, it sounded 'cleanest' this way, rather than ANY of my other designs. In truth, I originally doubted that the CTC Blowtorch would meet or beat this combination. Thank goodness, I was wrong."
The CTC Blowtorch beat the wirewound pot?
The CTC Blowtorch beat the wirewound pot?
You guys have me confused, I thought PMA was talking about permanent offset from input damage, no modern amplifiers I know of suffer from this. DC offset from residual slew asymmetry for 20V p-p square waves may or may not have any relevance to audio.
This is from the LME48710 device level spice model:
* MODEL FEATURES INCLUDE OUTPUT SWING, OUTPUT CURRENT THRU
* THE SUPPLY RAILS, OUTPUT CURRENT LIMIT, OPEN LOOP GAIN
* AND PHASE WITH CLOAD EFFECTS, SLEW RATE, COMMON MODE
* REJECTION WITH FREQ EFFECTS, POWER SUPPLY REJECTION WITH
* FREQ EFFECTS, INPUT VOLTAGE NOISE WITH 1/F, INPUT CURRENT
* NOISE WITH 1/F, INPUT BIAS CURRENT, OUTPUT IMPEDANCE,
* INPUT COMMON MODE RANGE, INPUT CAPACITANCE, INPUT OFFSET
* VOLTAGE WITH TEMPERATURE EFFECTS, AND QUIESCENT CURRENT
* VERSUS VOLTAGE.
* MODEL INCLUDES INPUT AND OUTPUT PROTECTION DIODES.
Simulating PMAs experiment immediately reveals a non inverting input current of about 4mA, consistent with the schematic (1k input resistor), input level (+/-10V) and the reverse breakdown of a BE junction (~6-7V). Lower the input level, and the non inverting input current decreases by a few orders of magnitude. It is very likely that those 4mA are damaging the input stage. BTW, immediately after applying, those +/-10V squares may still be 0-20V (minus a protection zener breakdown) at the non inverting input, until many milliseconds later, meantime certainly exceeding the maximum common mode voltage.
I will try myself to kill a few LM4562 by the same method as soon as I'll get in our university lab, I though find this destructive behaviour (permanent offset) very hard to believe or explain.
And now I really must sleep...
I believe Mr. Curl is torn between the reputation of Mr. Pass and his own taste for the magic.Interesting you say this, Nelson's paper only reinforces the opinion that most cable issues are solved by simple lumped element analysis.
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Simulating PMAs experiment immediately reveals a non inverting input current of about 4mA, consistent with the schematic (1k input resistor), input level (+/-10V) and the reverse breakdown of a BE junction (~6-7V).
If the model really does simulate to the extent of reverse breakdown of the input transistors I for one shall be staggered 😀
Apologies Pavel - I read your 20 V pk-pk as 20 V pk.
I think Jneutron has probably nailed it.
The spec sheet on this device does not include a simplifed circuit diagram, or the max differential input voltage or current. Given the low typical bias current of 10nA, the input devices are probably quite fragile, and may even have back to back protection diodes or transistors across the inputs.
In any event, I would not normally envisage this device being driven at these levels - but clearly if there is the oportunity for inputs at these levels, then some form of protection is needed. Onwe idea might be to connected to low capacitance diodes back to back across the inputs (you can get devices with 1-2pF capacitance).
I will give some feedback on the TI website - hopefully they can provide an explanation.
a number of low C data line protection parts have interesting specs - at a fraction of the C
onsemi CM1214A, ESD8472 are examples
some low noise BJT datasheets do warn that series R in unity feedback may be necessary to keep internal input protection clamping component current within abs max specs - often 10 mA
I would add a layer with the low C ESD devices where a few 100 Ohm doesn't destroy the noise performance and 10+ V "daylight" bandwidth input signal edges can't be avoided
I believe Walt Jung ran some input RFI tests on op amps - as I recall the AD797 did well - attributed to the low Z, linearization for small injected signals that the heavy input bias, large input device area presents
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I beleieve Walt Jung ran some input RFI tests on op amps - as I recall the AD797 did well - attributed to the low Z, linearization for small injected signals that the heavy input bias, large device area presents
Yet he's on record as having designed it out of one his regs in favour of a JFET part with inferior noise.
Can you elaborate further Abra? especially ..Nice work Pavel, correlates very well with what Ed Simon noticed and what my ears have told me 🙂 Given what Walt Jung found in his regs, I surmise that the AD797 would also fare badly in this test?
- what Jung found
- and how you conclude AD797 will be damaged by high input slew
Got a link or reference? Zillion V/us slew is pretty rare in regulator control loops.Yet he's on record as having designed it out of one his regs in favour of a JFET part with inferior noise.
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