I tested five different variations of F3, very good sound, but no a kind of "sparkling" and not a "pin-point" soundstage, that are achievable with good tube amps.
The shunt-like output buffer, all other being similar, sounds better.
In the buffer, I used HF MOSFETS RD100HH by Mitsubisi (160W heat dissipation, Ciss close to 250pF as you indicated), and in this thread, I used 4 x KP903A in parallel, 4W output power, just for getting sound impressions.
Theoretically, with common source stage, loaded by CCS, with NFB suppressing voltage amplification up to 1, we should get something similar to buffer-stage.
But, if the voltage amplification 20dB, then we add 10 x Crss to the Ciss value, and sound impression gets worse.
Common source amplification stage is good for low-Ciss jFETs, like K246.
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This is a good way, I agree, but it arises big costs in implementation, and I still theoretically prefer biamping, if loudspeaker design is siutable for its use.
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I could be misunderstanding you, but I was asking about their possible use in your shunt like buffer design from the first post. Isn't true that Crss is no problem with source followers and that you are only left to deal with Ciss. If so, how high is too high in terms of Ciss for this design? Sorry to be a bother.
Which Ciss is reasonable for follower-like stage, its difficult to make a grounded claim.
If Ciss does not vary strongly with Vds, and does not exceed in total 200...500pF, and transconductance is in 4S...10S range, and CCS is fast, and output "cluster"-cap is well designed, with high quality shunt cap, then we have very good grounds for good sound.
Many people repeated the original Ciuffolli's design with IRFP150. Not bad sounding, but not a top league. Usually the output cap issue is not cared enough.
Why should costs be higher....??
As i see it only change is in how you couple the J-fets and that you have the task of making a complementary amplifier driving the two legs....
Supply-voltage can be app halved so your get a wider selection of high-current Jfets. With half the voltage you only need half the number of devices end each leg...so in total will the heat dissipation and cost be roughly the same...
As i see it only change is in how you couple the J-fets and that you have the task of making a complementary amplifier driving the two legs....
Supply-voltage can be app halved so your get a wider selection of high-current Jfets. With half the voltage you only need half the number of devices end each leg...so in total will the heat dissipation and cost be roughly the same...
I think that's often the main source of capacitance, since (to first order) Ciss isn't being charged and discharged.
The only reference to the quality of these fets are those made by Nelson, and he seems to believe they are a big improvement over the IRF fets. Whether or not they will do well in this circuit, remains to be seen. Cuifoli suggested using less capacitance in power supply. Have you tried less or have you tried other PSU arrangements. His implementation seems to be simpler, but that is not necessarily better.
I don't think that Ciuffolli stressed attention to PSU properties, just simple regulation by cap multiplier.
Max attention is needed, in the Power Follower, to the CCS properties, including speed and pulse responce.
Sure, Nelson's FETs will be a great improvement over IRF, try them in most representative schematics Zen1 and Power Follower, then decide what direction do you prefer.
But, since Nelson's Jfets are SITs, they are not siuted for acting in CCS, standard MOSFETs or jFETs perform better in CCS.
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Vladimir,
What a regrettable waste of earth's precious resources. We should be grateful to Ciuffioli for inventing the true constant current source.
(Still wondering if electrons would go so far as to violate Ohms Law just to fit the theory).
You mean if Iccs = 1A I (load) = 1A I (active device) = 2A ???
What a regrettable waste of earth's precious resources. We should be grateful to Ciuffioli for inventing the true constant current source.
(Still wondering if electrons would go so far as to violate Ohms Law just to fit the theory).
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Well, according to the prevailing view. Nothing being explained in understandable physical terms, right now I`m looking at the emperor`s new clothes. For instance, I`m having some problems with applying the shunt concept to the AC model, seemingly, transistors don´t care about it (haven`t given up yet).
As I mentioned in that post, I speak about instanteneous currents values. And what you see strange, Iccs=1A (constant, does not change with signal), I (load) is for instance a sine wave 2A peak-to-peak, then considering instantaneous currents at positive and negative signal peaks, we have
pos peak: I (act dev) = I (PS) = Iccs + I (loadd) = 1A + 1A = 2A
neg peak: I (act dev) = I (PS) = 1A -1A =0 A
Final conclusion, that dozens of people try to explain you, that in traditional approach, under signal, instantaneous current consumption from PS varies around the Iccs value, according to the signal wave, supeposed over the Icss constant.
The last is not valid for shunt-like buffer, where instantaneous I (PS) = Icss independent of whether signal is present or not.
WuYit,
Maybe you could convince yourself by running the simplified circuits in a simulator and looking at the instantaneous current waveforms. If you run LTspice, you could try the attached file (with renaming), otherwise you might whip something up in your favorite simulator.
Maybe you could convince yourself by running the simplified circuits in a simulator and looking at the instantaneous current waveforms. If you run LTspice, you could try the attached file (with renaming), otherwise you might whip something up in your favorite simulator.
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thune,
those numbers are irrelevant. The DC current is set by the constant current source, regardless of what happens dynamically (AC wise). This applies to any stage in any topology - without any gimmicks. Why on earth would the grounded drain output stage suddenly constitute an exception?
Power supply rails serve as AC ground. Since the load is connected between source and AC ground in both cases, the influence of load impedance on amplifier parameters is the same. The shunt concept is a fictive nonsense. One is not more "shunt" than the other.
DC ground has nothing whatsoever to do with function. What transistors care about is the governing voltage on their control terminals and I would not apply that voltage the way it is done here other than at gunpoint.
those numbers are irrelevant. The DC current is set by the constant current source, regardless of what happens dynamically (AC wise). This applies to any stage in any topology - without any gimmicks. Why on earth would the grounded drain output stage suddenly constitute an exception?
Power supply rails serve as AC ground. Since the load is connected between source and AC ground in both cases, the influence of load impedance on amplifier parameters is the same. The shunt concept is a fictive nonsense. One is not more "shunt" than the other.
DC ground has nothing whatsoever to do with function. What transistors care about is the governing voltage on their control terminals and I would not apply that voltage the way it is done here other than at gunpoint.
Vladimir.
How about making a 2SK170BL version.
Could be as many as 5-6 transistors for CCS and 5-6 for drive.
I guess there are guys having a supply of 2SK170BL at home.
THe performance should be fairly good with 2SK170BL
using your idea and circuit.
How about making a 2SK170BL version.
Could be as many as 5-6 transistors for CCS and 5-6 for drive.
I guess there are guys having a supply of 2SK170BL at home.
THe performance should be fairly good with 2SK170BL
using your idea and circuit.
WuYit,
Sounds like you accept that the current draw (from the supply) is constant in one case and varying (with the signal) in the other. No-one has suggested that the amplifying device sees any different currents or voltages in these two topologies: it is the supply that sees different currents.
Sounds like you accept that the current draw (from the supply) is constant in one case and varying (with the signal) in the other. No-one has suggested that the amplifying device sees any different currents or voltages in these two topologies: it is the supply that sees different currents.
In this case it will be difficult to accumulate reasonable idle current. In my case, 4 pcs of KP903A produce 1200mA idle current, even with the source degeneration resistors 5,1 Ohms.
With 8mA typical Idss current for 2SK170BL, one will need 150pcs at least for replacing 4pcs of KP903A, not mentioning that 150pcs of 2SK170BL will accumulate total Ciss = 150 x 30pF = 4500pF, while 4pcs KP903A accumulate Ciss = 4 x 15pF = 60pF.
Nevertheless, Nelson Pass tested this idea (another schematics) with 1000pcs of 2SK170, and the results gave ground for his order for dedicated development of SIT transistors.
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