Corrections finally made ( Gary has been very patient with me )
I had not read Gary’s drawing correctly ( for about 10 times ! )
Hopefully you’ll see what was missing by the 2 photos ( you don’t want me explaining it )
1st is how I was trying to fire up the beast
2nd photo is how it should be
Note the link ( pink ) and the purple and the brown.
Once this operates properly I will do something with the wires btw .
I had not read Gary’s drawing correctly ( for about 10 times ! )
Hopefully you’ll see what was missing by the 2 photos ( you don’t want me explaining it )
1st is how I was trying to fire up the beast
2nd photo is how it should be
Note the link ( pink ) and the purple and the brown.
Once this operates properly I will do something with the wires btw .
please Guyz, take a look at this
I'm taking PN junction as 0V65; in praxis it can be anything between smidge bellow 0V6 and up to 0V7
thoughts?
I'm taking PN junction as 0V65; in praxis it can be anything between smidge bellow 0V6 and up to 0V7
thoughts?
Thanks Zen Mod, that all looks fine to me for the FE pcb .
The member did not have the connection from the positive side of the OS joining to the neg side of the OS where this feeds the pos speaker connection. Basically the OS was open circuit, so no current could flow at all.
Andy, ZM has shown 7 voltage levels on the above schematic. DMM on VDC range and red lead at top of component and black lead at bottom of component as you look at the schematic.
1.3VDC across R5 P1 - adjust P1 to get that voltage to start with, this will change as you adjust the bias current later and you monitor the DC offset voltage.
17VDC across R7
0.65VDC across R8
9.1VDC across D5 zener
1.3 VDC across diodes D1 / D2
0.65VDC across R12
0.65VDC across R11
Carefully measure these voltages on both your FE cards with bias pot at max resistance. Record all voltages for both channels and write them here, thanks.
The member did not have the connection from the positive side of the OS joining to the neg side of the OS where this feeds the pos speaker connection. Basically the OS was open circuit, so no current could flow at all.
Andy, ZM has shown 7 voltage levels on the above schematic. DMM on VDC range and red lead at top of component and black lead at bottom of component as you look at the schematic.
1.3VDC across R5 P1 - adjust P1 to get that voltage to start with, this will change as you adjust the bias current later and you monitor the DC offset voltage.
17VDC across R7
0.65VDC across R8
9.1VDC across D5 zener
1.3 VDC across diodes D1 / D2
0.65VDC across R12
0.65VDC across R11
Carefully measure these voltages on both your FE cards with bias pot at max resistance. Record all voltages for both channels and write them here, thanks.
While doing voltage checks, with no bias current, can you measure the voltage at +C and -C on the FE boards. DMM on VDC range with pos meter lead on the +C and then the -C lands on the FE card with the black lead on PSU star point ground. Record here for both boards, thanks.
You might also want to do this when you have a clear head and are refreshed - don't rush it.
You might also want to do this when you have a clear head and are refreshed - don't rush it.
Your first 7 readings on this channel agree with Zen Mod - so that is good.
I would expect the +C reading to GND to be around +45VDC and the -C reading to GND to be around -45VDC, with +/- 73VDC rails.
Not sure what the reading you show at C+ and C- being 16.32V is!
Now we need the right channel voltage readings at the same points.
I would expect the +C reading to GND to be around +45VDC and the -C reading to GND to be around -45VDC, with +/- 73VDC rails.
Not sure what the reading you show at C+ and C- being 16.32V is!
Now we need the right channel voltage readings at the same points.
Right channel
P1 & R5 nothing changes when I turn the pot .
All leds for right channel are on at the front display
P1 & R5 nothing changes when I turn the pot .
All leds for right channel are on at the front display
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you have inputs (positive and negative) shorted to GND while testing FE?
and I hope you have just FE connected to PSU, no connection to OS at all and OS being in other room ......... just to be sure that you didn't left any wire connected between them
and I hope you have just FE connected to PSU, no connection to OS at all and OS being in other room ......... just to be sure that you didn't left any wire connected between them
servo function of input LTP is taking care that there is no change in output node voltage potential, due to AC coupling of negative input (C2)
though, P1 certainly is somewhat changing voltage across R11 and R12, current through Q6, Q7
feel free to leave P1 maxed
P2 set, prior to connecting OS, to have minimal possible voltage between D+ and D-
now, Gary seems to have sorted OS wiring arrangement, hope he'll walk you through checking procedure
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Which led me to discover that the front led panel was wired around the wrong way , so another thing learned.
We are slowly getting there, the member (Andy) has come a long way on this rebuild and hopefully learnt a lot - not bad at all for a total novice.
The first channel is working and biasing up well, the DC mV offset volts is a bit high but we will see were that lands at max bias.
To be continued tomorrow, sleep time in the UK.
The first channel is working and biasing up well, the DC mV offset volts is a bit high but we will see were that lands at max bias.
To be continued tomorrow, sleep time in the UK.
WOW!!! Congratulations, you will serve as an inspiration as I troubleshoot a couple of products!
Yes, the generosity w/ time and knowledge of many members of the forum is incredible, but don't sell yourself short!