The current will flow back into the driver in any case (even with single resistor), when it will close/discharge the mosfet's gate capacitance. 😀
Allright I'll just lie to him that that the comparator approach didn't work and I've decided to go back to my initial method of implementing dead time.
Your proposed schematic will work too, but will have some problems with component values accuracy (capacitance differs +/-5% from marked value, resistors are in the same range too). So if one resistor or capacitance in Hin network differs from network in Lin, then this will produce different/shifted PWM signal, with possible time overlaps and/or gaps. Do you need it? 😉 You can argue this to your teacher 😀
And RD network between driver and mosfets cannot change anything so dramatical, as RD network before driver, at least because mosfets are NOT schmidt triggers. 😛
And RD network between driver and mosfets cannot change anything so dramatical, as RD network before driver, at least because mosfets are NOT schmidt triggers. 😛
Alright thanks I'll use that as a argument if he asks why I haven't implemented dead time.
My veroboard layout would be so Simple with this.. Also the XOR gate can handle two gate drivers for full bridge right?
Something about Fanout
My veroboard layout would be so Simple with this.. Also the XOR gate can handle two gate drivers for full bridge right?
Something about Fanout
I have nothing found about Hin/Lin capacitance of IR2110 in its datasheet, but this is "CMOS compatible" 😀 I am pretty sure, that this will handle up to 10 drivers 😛.
Also, CD4070 has four elements, so these can be always used to connect the second driver. 😉
Is there anything else other then this?
I need to justify myself to him clearly. Heck even IR does it. I saw a few of their schematics and even they have the diode in parallel at the output as well.
But just showing him IR's schematic won't fly. I will explain about the slow rise caused by the resistor and fast fall because of the diode. But I will need more reasons.
Slow rise and fast fall will produce the deadtime - this is what you need and this is a main reason 🙂 And this does not makes any sense for the driver, whether this drives the mosfet gate via resistor or via diode.
Do you mean to add the difference between high and low state output resistance? And to add input capacitance of gate driver, and add intrinsic dead time of gate driver, etc...? If somebody can't make a multiplication, then I don't think it's good to tell him everything in it's complexity.
Pre-driver dead time adjustment is definitely superior to the gate-diode trick, but this is not the project where it counts.
Do you have any examples of finished DIY or commercial projects, where the pre-driver deadtime creation is used? 🙄 Why is it 'superior'? 😕
Yeah Look, embarrassingly I know my limits.
Easiest Approach I like to take is my conclusion. I did make the comparator approach work and had it running pretty well with 10V supply across the FETS. But the voltage rails needed were annoying and to think I have to do that on veroboard.
Yuck, No thanks..
When all this is said and done. I'm gonna take the advice of who ever said it to, go back and try out very simple linear amplifiers in the holidays and then SMPS before coming back to class D.
Playing with electronics is fun when you do it right and the feedback left in this Forum is tremendous. Only problem is, lol, sometime you don't get the answers right away, and its like a easter egg hunt and you have to search for it here.
Easiest Approach I like to take is my conclusion. I did make the comparator approach work and had it running pretty well with 10V supply across the FETS. But the voltage rails needed were annoying and to think I have to do that on veroboard.
Yuck, No thanks..
When all this is said and done. I'm gonna take the advice of who ever said it to, go back and try out very simple linear amplifiers in the holidays and then SMPS before coming back to class D.
Playing with electronics is fun when you do it right and the feedback left in this Forum is tremendous. Only problem is, lol, sometime you don't get the answers right away, and its like a easter egg hunt and you have to search for it here.
Don't stop now your nearly there 🙂
In relation to your gate drive topology your teacher is right although i don't think he fully understands why. You see you will get just as much current punching back into the gate driver with or without using a resistor diode gate timer circuit upon switch off. On switch on however there will be less current flowing through the timing cicuit than without it. The IR driver you are using is built to handle this current so unless you are driving multiple fet gates in parallel you shouldn't have anything to worry about. The thing is, using pre-driver dead time is the way to go if you need sub 100n/s timing. you cannot reliably set it using post driver gate timing as there are too many influences altering the gate load. There is the miller capacitance from gate to drain and also capacitance from gate to source. Both these capacitances alter with voltage and current, the miller capacitance altering quite a lot. So these two parameters alone start to interfere with your gate timing if using the post driver soloution. There is also inductance causing voltage over/undershoots in the package that can effect this type of gate timing, not to mention the transconductance alters under load, causing the gate threashold to alter. All these things effect the timing when post driver resistors are used along with the gates own capacitance and voltage to set the point the fet conducts. Pre-driver timing although using the same principle of using the cmos gates capacitance along with resistance to set the timing is much better because the input capacitance/impedance should hardly alter allowing for some really fine cut timing. Also your gate should be connected directly to the driver so it can ram current in and out of the switching fets gate to follow your pre-driver timing accuratly regardsless of the voltage and load conditions on the output bridge. ( I always do things this way, but i also add a small resistor at the gate ( 5.6R ) to keep oscillation at bay ( Stray inductance on the gate ect )). Hope this clears things up a little for you.
In short: If you dont need accurate gate timing as in a SMPS, motor controllers or low freq amp say, a subwoofer amp then yes... definatly go for post drive timing. However if you need very tight timing for high frequency applications then you really should be using the more accurate pre-driver setup. Both use the same components, both are easy to implement.
Hope this is of help and not too inacurate. We are all infalable, even parents and teachers 😀
In relation to your gate drive topology your teacher is right although i don't think he fully understands why. You see you will get just as much current punching back into the gate driver with or without using a resistor diode gate timer circuit upon switch off. On switch on however there will be less current flowing through the timing cicuit than without it. The IR driver you are using is built to handle this current so unless you are driving multiple fet gates in parallel you shouldn't have anything to worry about. The thing is, using pre-driver dead time is the way to go if you need sub 100n/s timing. you cannot reliably set it using post driver gate timing as there are too many influences altering the gate load. There is the miller capacitance from gate to drain and also capacitance from gate to source. Both these capacitances alter with voltage and current, the miller capacitance altering quite a lot. So these two parameters alone start to interfere with your gate timing if using the post driver soloution. There is also inductance causing voltage over/undershoots in the package that can effect this type of gate timing, not to mention the transconductance alters under load, causing the gate threashold to alter. All these things effect the timing when post driver resistors are used along with the gates own capacitance and voltage to set the point the fet conducts. Pre-driver timing although using the same principle of using the cmos gates capacitance along with resistance to set the timing is much better because the input capacitance/impedance should hardly alter allowing for some really fine cut timing. Also your gate should be connected directly to the driver so it can ram current in and out of the switching fets gate to follow your pre-driver timing accuratly regardsless of the voltage and load conditions on the output bridge. ( I always do things this way, but i also add a small resistor at the gate ( 5.6R ) to keep oscillation at bay ( Stray inductance on the gate ect )). Hope this clears things up a little for you.
In short: If you dont need accurate gate timing as in a SMPS, motor controllers or low freq amp say, a subwoofer amp then yes... definatly go for post drive timing. However if you need very tight timing for high frequency applications then you really should be using the more accurate pre-driver setup. Both use the same components, both are easy to implement.
Hope this is of help and not too inacurate. We are all infalable, even parents and teachers 😀
Ok I'm attempting to go above 100 nS dead-time and I am switching it at 196Khz at the moment.
So Post resistor-diode is enough then right?
And like you said, IR2110 can handle the current as well.
I'll be satisfied myself If i only saw ringing when i zoom in on the waveform in the scope and don't see clear signs of ringing without zooming it.
Otherwise I can use the pre timing circuit. But I need help like I prev stated with the cap and resistor values. I do not understand what the statement in the application note meant.
PS: Thanks for the detailed explanation of whats happening.
So Post resistor-diode is enough then right?
And like you said, IR2110 can handle the current as well.
I'll be satisfied myself If i only saw ringing when i zoom in on the waveform in the scope and don't see clear signs of ringing without zooming it.
Otherwise I can use the pre timing circuit. But I need help like I prev stated with the cap and resistor values. I do not understand what the statement in the application note meant.
PS: Thanks for the detailed explanation of whats happening.
If your using more like 200n/s then i would think that post timing would be quite acceptable. Regarding your ringing on the fet bridge, i doubt you are suffering from shoot through with large dead times or even diode recovery conduction. If your using long leads, bread board and insuficient power supply decoupling i bet that is a major cause of ringing. Also Guestimating the inductor value can cause ringing. Do some research into snubber networks on the net. These are particulary effective at reducing ringing and oscillation.
One last thing... make sure the ringing you see is actually there and is not just bad measurement techneques. I often use breadboard myself for the first prototypes and find as soon as i create a pcb with thick tracks for the high current stuff almost all overshoot and ringing disappers. Its mainly inductance and resistive connections on breadboard, croc clips ect that cause these nastis.
Leigh
One last thing... make sure the ringing you see is actually there and is not just bad measurement techneques. I often use breadboard myself for the first prototypes and find as soon as i create a pcb with thick tracks for the high current stuff almost all overshoot and ringing disappers. Its mainly inductance and resistive connections on breadboard, croc clips ect that cause these nastis.
Leigh
Yes, most of my amps have pre-driver dt, and for example Eva uses it too as I know. This way switching speeds can be controlled independently from dead time, and it's more stable.
Lol. How Embarrasing.
I implemented 250nS using Pre-timing when the resistor-diode alone would've done it 😱
2 comparators, 3 diff voltage rails all for just 250nS, which those 2 components would've given me.
Also, let us calculate, how much deadtime you need:
IR2110 propagation delays, Cload = 1.7 nF, ns:
ON delay + rise time: 120 + ~45
OFF delay + fall time: 94 + ~30
IRF540Z delays, Rgate = 12 Ohm, ns:
turn ON delay + rise time: 15+51
turn OFF delay + fall time: 43+39
Common delays:
ON: 120 + 45 + 15 + 51 = 231 ns
OFF: 94 + 30 + 43 + 39 = 206 ns
Opening slower (231 ns) than closing (206 ns) we get the deadtime (25 ns). So why it is needed to have 250 ns? 😕 I would like to add some other 30-50 ns, but NOT 250! 🙂
Also, there is very helpful doc from IR: http://www.irf.com/technical-info/appnotes/an-1071.pdf
Good Luck! 😉
- Status
- Not open for further replies.