Dac Question - Cs8412 ..... Pcm63

dddac

Member
Paid Member
2003-07-02 10:10 pm
Wiesbaden
blog.dddac.com
maartentje said:
Hay Guys.

I want to build a DAC with a CS8412 or CS8414 and a PCM63.

* Is there a schematic with a CS8412-CS5842-PCM63?
* Is the SM5842 the same as a DF1704
* Is the SM5813 the same as a DF1700

Greetz Maarten


maartentje said:

Sure have a look at my Site www.dddac.de

the sm5842 is totally different... and also better !!

take care
doede




:)
 
Thanks! yeah i like it but can i remove the filter selection?

Just a another question can i replace the pcm56 with a pcm63 in the schematic below?

thanks!
 

Attachments

  • kairo03.gif
    kairo03.gif
    8.6 KB · Views: 1,057
If your building a DAC like this , have a read of my
June 1997 Electronics World article about overcoming SPDIF

You will need to purpose modify a CD player to extract
DATA, LRCK ,BITCLOCK and using 74AC74 flip flops
clock each of these individual signals upon transmission from
the Cd player and reception at the DAC ie 6 flip flops
or 4 if you want to use the dual feature of these chips.

The aforementioned signals then feed the DF 1700
directly bypassing SPDIF altogther. recommended you
use a line driver such as from Maxim , the Max 497
to effect transfer as 75 ohm feeds.

It works spectacularly , but becomes a unique set up
making that CD player and DAC a tied combination
Its benefits are that SPDIF multiplexing is permanently
avoided. Cheers / chris
 
Perhaps you would care to explain why you feel it is necessary to use something so fast. That way, when the "signal integrity" crowd joins in, I won't look like the Lone Ranger.

In the meantime, you may want to check out Guido Tent's site. I believe that you may find some articles there that will help to explain. If they aren't there, let me know and I will dig out the links.

Jocko
 
Give me a break.........a few nSec of prop delay are going to muck up the sound????

I don't have to "report back". I already know. Excessive di/dt rates, higher circulating RF currents....both leading to EMI out the wazoo..........you have to be nuts to use AC.

And let us not forget how many logic families they invented after this crap came out to fix the ground bounce problem.

Go look up Howard Johnson's book while you are at it. You seem to need the enlightenment.


Jocko
 
Dear Jocko Homo

You seem to have a particular disliking of AC logic gates
which Im trying to fathom why. I have noted your
other contributions, and your reference to Howard Johnsons
book- without naming that book as such.

Are you referring to ground loops when using the term
ground bounce.? If not what exactly is ground bounce?
its not a terminology I have heard before,
I would be interested to know further, and I will look up more information from this forum.

I can understand precautions with any high frequency
circuit involving careful routing of signal wires, use of coaxial
cable, resistive terminations and judicial use of decoupling
where there is extended bandwidth, but AC logic in this implementation is fine, perhaps this circuit somehow
avoids the problems you highlight, or I had a lucky day ,in
which case your dread of AC devices might be lessened- and hopefully not heightened.

It also functions quite happily with HC devices as well, but
I think sounds better with AC. There may well be better devices
still which are worth experimenting with. Always willing to
learn. Cheers / Chris


:smash:
 
Thanks for those references, the author defines the phenomenen
as :

"Ground bounce, which is nothing more than noise on a chip's internal ground rail, mostly involves how quickly you change the current flowing through the chip's ground connections. Noise on the internal VCC rails within a chip involves how quickly the VCC currents change. Slowing the rate of change of either current reduces the noise on the affected internal power or ground rail.

The author also offers little information as to what frequency
this occurs at, but provides 600Mhz as one example, he also
provides that the problem of ground bounce is lessened by
practice of good grounding technique inferring resistive terminations and general good coaxial transmission line techniques.

I consider his findings have merit where unterminated lines
are used , and where ground loops are otherwise encouraged
to occur. The problem would appear to arise as the internal parts of the ic are then conversant further afield, in someways using
poor layout as inviting the problem spilling out of the ic case.


The author concentrates the discussion around internal ic architecture.

Is it likely then considering the definition of a wavelength and the fequency being switched that is to switch BCK LRCK and DATA ( a CD players wordlengths ) that this problem would occur ?

I think not providing coaxial lines are used for signals ,
power supply decoupling and good grounding techniques are employed.

I have not witnessed any problem from using AC devices as opposed to HC in the circuit descibed in Wireless World June of 1997. Additional to that circuit proposed I have used a Maxim Max 497 75 ohm line driver placed between the transmission flip flops
and reception flip flops.

Should a better device become available I will post back to
this forum.

Cheers / Chris
 
Dear extreme bocky, and others interested in this
implementation

Here is an adjusted article which The Absolute Sound printed
and this magazine- enjoy the music has kindly put up on the net.

http://www.enjoythemusic.com/magazine/viewpoint/0401/deficienciesofspdif.htm


You can also order the original through Electronics World
by finding the article under CD jitter Bug
http://www.softcopy.co.uk/mag/default.asp?dir=ew&p=fulllist&id=79



The only change is a Maxim - Max 497 as an 75 ohm driver
following the transmission end flip flops then interfacing to
the reception end devices.

Cheers / Chris