Both the Amanero and XMOS solutions are classic and excellent. The China-made chipset (MCU CH32V307 + CPLD AGRV2KQ32) also delivers solid sound quality at a more cost-effective price. As for the PCM2706, since it was recommended by Miro earlier, I want to give it a try.
9527
Also it works in adaptive mode with internally recovered clock (not asynchronous wit audio clock), so have a big problem with bitperfect low jitter playback.
But, it is very simple and cheap.
Alex.
A couple of them have already asked me to replace PCM2706 with Amanero or JLS I2S Over USB in old DACs. I guess it's doable on some devices, mostly where there is room for a new, larger card. One added I2S Over USB (SPDIF output) to the SPDIF input of an old DAC without a USB input. And he is very satisfied with the result. And it will be even better when I make a separate power supply for the JLS card. 😎
Last edited:
I'm aware of the PCM2706's spec limitations. But considering my setup uses PCM56P (also capped at 44.1kHz/16bit), and 99% of my listening is CD-based lossless rips in native 16/44.1 format, I suspect there might be no audible difference between PCM2706 and higher-end interfaces like Amanero/XMOS when handling these Red Book standard sources.
9527
9527
Most recordings are in mp3 or CD quality 😊 ... PCM2706 is really not that bad (only because it is cheap and synchronous) for these DACs 🙂
Placebo biasing factor is so strong, that if a friend ask you to change PCM2706 with XMOS device in his player, you agree and bring him the device "upgraded", but you haven't actually replaced anything, he will be satisfied with new and better sound
Placebo biasing factor is so strong, that if a friend ask you to change PCM2706 with XMOS device in his player, you agree and bring him the device "upgraded", but you haven't actually replaced anything, he will be satisfied with new and better sound
Speaking of sampling rate, why does my AD1862 with shift registers only work fine up to 192kHz? AD1865 runs 384k without problems. JLS directly into AD1862 without shift registers works 384k. I tried the HCT and AHCT shift registers, the same thing. The card is Amanero, but it was the same with JLS.
Thanks for the reminder!
Since my CD rip files are in 16-bit/44.1kHz, I plan to set my PC’s output to 16-bit/44.1kHz and have the PCM56P operate at 16-bit/44.1kHz. But you mentioned that the PCM56P would inherently operate at a fixed 96kHz even if the input is 44.1kHz?
9527
Since my CD rip files are in 16-bit/44.1kHz, I plan to set my PC’s output to 16-bit/44.1kHz and have the PCM56P operate at 16-bit/44.1kHz. But you mentioned that the PCM56P would inherently operate at a fixed 96kHz even if the input is 44.1kHz?
9527
Of course not. It does what you give it, up to 96k sampling rate. If the file is 24bit/96kHz, then the lowest 8 bits are lost, but the sound is normal.
Performance aligns exactly with pre-build projections - just as anticipated.
16-bit/44.1kHz is perfectly adequate here - all my sources are lossless CD rips. The native resolution aligns flawlessly with Red Book standards.
9527
16-bit/44.1kHz is perfectly adequate here - all my sources are lossless CD rips. The native resolution aligns flawlessly with Red Book standards.
9527
Sample rate limitation of PCM2706 is not a big problem, if you listen 44/16.
Problem is nonasync. operation (i.e. "adaptive") and recovered clock with high jitter.
Alex.
Because the L/R channels split implemented in Miro designs do not reduce the bitclock frequency.
In I2S one stereo frame has 64 bit clocks per sample (2x32). So when the same amount of data now transmitted over two wires instead of one, the bit clock should be divided by two. It does not happen in this design. And the DAC ICs are not designed for that.
Basically, this is the reason - JLsound (and York 🙂 ) take this into account and generate correct bit clock.
PCM63 works at clock up to 25 MHz (datasheet), so it can work at 768kHz.
It is certainly much more than necessary. 😆
Thank you for the clarification. I don't care if it runs or not at 384k, I was just wondering why it has that limit.
Thank you for the clarification. I don't care if it runs or not at 384k, I was just wondering why it has that limit.
@NIXIE62 Problem why AD1862 with shift registers can not handle 384k is good explained by @eclipsevl ... AD1862 with shift registers are designed to 64bit frame system from these shift registers.
If you need to understand it more deeper, we can do easy calculations:
LRCK 48 kHz ... to transfer 64bit frame is BCK: 48 kHz * 64 = 3.072 MHz
LRCK 192 kHz ... to transfer 64bit frame is BCK: 192 kHz * 64 = 12.288 MHz
LRCK 384 kHz ... to transfer 64bit frame is BCK: 384 kHz * 64 = 24.576 MHz
Shift registers are able to transfer this 24.576 MHz, but AD1862 can not accept this fast frequency and limit is 17 MHz. AD1865 have even slower input clock only 13 MHz - but it works somehow 😀, note that it can run with errors.
JLS and York can internally align data and send it into DAC slower with BCK/2 speed, which is fast enough within 384 kHz LRCK 🙂 (it is almost impossible to make this with simple logic)
But the correct answer why AD1865 with shift registers works and AD1862 does not is: "mystery" .. PCM63 is super fast and can accept the input clock 30 MHz.
If you need to understand it more deeper, we can do easy calculations:
LRCK 48 kHz ... to transfer 64bit frame is BCK: 48 kHz * 64 = 3.072 MHz
LRCK 192 kHz ... to transfer 64bit frame is BCK: 192 kHz * 64 = 12.288 MHz
LRCK 384 kHz ... to transfer 64bit frame is BCK: 384 kHz * 64 = 24.576 MHz
Shift registers are able to transfer this 24.576 MHz, but AD1862 can not accept this fast frequency and limit is 17 MHz. AD1865 have even slower input clock only 13 MHz - but it works somehow 😀, note that it can run with errors.
JLS and York can internally align data and send it into DAC slower with BCK/2 speed, which is fast enough within 384 kHz LRCK 🙂 (it is almost impossible to make this with simple logic)
But the correct answer why AD1865 with shift registers works and AD1862 does not is: "mystery"
.. PCM63 is super fast and can accept the input clock 30 MHz.