Thanks for the info, I will have to do alot of readings this weekend before start the soldering.
Ask first, solder second...
I'm excited to begin building my new interface! I have four quick questions.
1. I have not seen officially where 5-7V external power should enter the Cronus to use the voltage regulators. I assume it is the VD/GND pads that are spaced for terminal-blocks, beside the B3SE outputs. Correct?
2. What are D7 and D8, and why would one install connectors there? (I see Miero did so.)
3. Software development willing, eventually I will hope to split the Cronus clock signals out to a second DAC (my old B2). Is Cronus signal strength sufficient to lock two DACs? If not, I might have to use one 8 channel Buffalo, though I prefer to run two stereo 9018s.
4. Russ suggested a 'low' orientation for the Cronus when interfacing to a B3se. In that case, what kind of connectors do you recommend between Cronus and B3se?
Cheers,
Frank
I'm excited to begin building my new interface! I have four quick questions.
1. I have not seen officially where 5-7V external power should enter the Cronus to use the voltage regulators. I assume it is the VD/GND pads that are spaced for terminal-blocks, beside the B3SE outputs. Correct?
2. What are D7 and D8, and why would one install connectors there? (I see Miero did so.)
3. Software development willing, eventually I will hope to split the Cronus clock signals out to a second DAC (my old B2). Is Cronus signal strength sufficient to lock two DACs? If not, I might have to use one 8 channel Buffalo, though I prefer to run two stereo 9018s.
4. Russ suggested a 'low' orientation for the Cronus when interfacing to a B3se. In that case, what kind of connectors do you recommend between Cronus and B3se?
Cheers,
Frank
@francolargo
1. Yes - 5V is best - and yes the terminal spots next to the B3SE outputs.
2. They are simply for access to D7 and D8 on B3 in case one wished to use them for SPDIF or something.
3. You would be best to use Teleporter to send the master clocks if the DACs are not close - not send CMOS. If they are very close CMOS may work satisfactorily.
4. uFL or straight wire if the distance is short.
Cheers!
Russ
1. Yes - 5V is best - and yes the terminal spots next to the B3SE outputs.
2. They are simply for access to D7 and D8 on B3 in case one wished to use them for SPDIF or something.
3. You would be best to use Teleporter to send the master clocks if the DACs are not close - not send CMOS. If they are very close CMOS may work satisfactorily.
4. uFL or straight wire if the distance is short.
Cheers!
Russ
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Thanks so much, Russ!
I have 4 Teleporters on hand! 🙂 So, a) another yes to Teleporter interfaces, and b) are you suggesting synchronous DAC operation? I thought asynch with exactly matching data 'delivery', would be sufficient. The second DAC is for bass (<150 Hz).
Frank
I have 4 Teleporters on hand! 🙂 So, a) another yes to Teleporter interfaces, and b) are you suggesting synchronous DAC operation? I thought asynch with exactly matching data 'delivery', would be sufficient. The second DAC is for bass (<150 Hz).
Frank
I'm going to try synchronous output on my Buffalo IIs. Do I need to remove one of the Tridents?
Well, I removed L3 ferrite beads and connected MCK on Cronus to the label sides of the R17 pads. I haven't connected MCK ground as the Cronus and one BII share a Placid and both BIIs have grounds connected. I haven't removed any Tridents. MPD is playing, but I'm not getting a lock.
C13 on the Cronus on v_1.2
Hi Russ,
I noticed the addition of C13 near the IC6 on the latest Cronus (v_1.2). What is this for? Can I go without it like v_1.1?
TIA
Hi Russ,
I noticed the addition of C13 near the IC6 on the latest Cronus (v_1.2). What is this for? Can I go without it like v_1.1?
TIA
A pair of dividers in the future?
Hi Russ,
I applied a 98.304MHz VCXO (ABLNO) to the Cronus with J1:4 and confirmed the H/W divider on the board to work beautifully as previously suggested by you.
However, as expected, there was a trade-off to change the playing speed of other sources with different multiple of basic fs.
This can be solved by implementing a pair of H/W dividers which can deal with 48k and 44.1k sources, respectively. I hope this proposal will be included in your to-do list.
Thanks.
Hi Russ,
I applied a 98.304MHz VCXO (ABLNO) to the Cronus with J1:4 and confirmed the H/W divider on the board to work beautifully as previously suggested by you.
However, as expected, there was a trade-off to change the playing speed of other sources with different multiple of basic fs.
This can be solved by implementing a pair of H/W dividers which can deal with 48k and 44.1k sources, respectively. I hope this proposal will be included in your to-do list.
Thanks.
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I probably would not do this - there are good reasons why.
Most important is because it is intended that the clocks be made available to DACs as a synchronous master clock. You would not want to mix ratios in that case because some DACs have very different configurations for clock rates.
Better would be for you to just get another clock of the same multiple. 🙂
Then your DAC will be dealing with master clocks in the same range.
There are other reasons as well - but this is the most important.
Cheers!
Russ
Duffy Moon: yes, you need to remove Trident for Clock. And also set DPLL to maximum to have instantaneous lock.
@Duffy
I think I would stick to async in your case - especially because you are dual mono with BII.
If you are still hip to try sync mode you will want the DPLL opened as wide as you can get it (this causes the DPLL to freewheel with the MCK)
You will also need to shield the clock signals - so use coax.
I think I would stick to async in your case - especially because you are dual mono with BII.
If you are still hip to try sync mode you will want the DPLL opened as wide as you can get it (this causes the DPLL to freewheel with the MCK)
You will also need to shield the clock signals - so use coax.
Thanks guys. Well I've already started, so might as well go the whole way. 🙂
Is it the DVCC Trident which should be removed? Should I connect MCK ground? If so, does it matter where to?
Is it the DVCC Trident which should be removed? Should I connect MCK ground? If so, does it matter where to?
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No it's the clock trident (VDD_XO). 🙂
I am a bit worried you may have killed your clock if you were trying it without removing the clock tridents first... 🙁
I am a bit worried you may have killed your clock if you were trying it without removing the clock tridents first... 🙁
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Ahh. Well it'll have to be synchronous now then!
How do I open DPLL? Is that a Botic config option?
How do I open DPLL? Is that a Botic config option?
No - it's a DAC configuration.
I was referring to the cronus clocks that might be damaged - but the DAC clock as well.
I was referring to the cronus clocks that might be damaged - but the DAC clock as well.
Duffy if you expecting you will need a lot of help for your particular setup then please start a thread specific to your build.
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