Thinking about the LSB
If you shift the 16-bit word to the left, you get a 17-bit word where the LSB will be 0. Since the DAC accepts 16-bit word as rfbrw and SSerg pointed out, the MSB must be be stripped. The original MSB will now be used for switching between upper/lower DAC, and it will not enter into either DAC.
The lower DAC will get xxxx xxxx xxxx xxx(0) between 0 and 65535, and 1111 1111 1111 111(0) between 65536 and 131071.
The upper DAC will get 0000 0000 0000 000(0) between 0 and 65535, and xxxx xxxx xxxx xxx(0) between 65536 and 131071.
I put a (0) for the LSB which is not coming from the input 17-bit word. Alexandre, you are right, this bit has to follow the other bits, it should be 1 if all 15-bits are 1, and 0 if all 15-bits are 0, or derived from a 20/24-bit word (or random/dither?) if the 15-bits are x. This needs some logic circuit.
If you shift the 16-bit word to the left, you get a 17-bit word where the LSB will be 0. Since the DAC accepts 16-bit word as rfbrw and SSerg pointed out, the MSB must be be stripped. The original MSB will now be used for switching between upper/lower DAC, and it will not enter into either DAC.
The lower DAC will get xxxx xxxx xxxx xxx(0) between 0 and 65535, and 1111 1111 1111 111(0) between 65536 and 131071.
The upper DAC will get 0000 0000 0000 000(0) between 0 and 65535, and xxxx xxxx xxxx xxx(0) between 65536 and 131071.
I put a (0) for the LSB which is not coming from the input 17-bit word. Alexandre, you are right, this bit has to follow the other bits, it should be 1 if all 15-bits are 1, and 0 if all 15-bits are 0, or derived from a 20/24-bit word (or random/dither?) if the 15-bits are x. This needs some logic circuit.
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Serg, it is truly hard to relay things here in a manner that everybody understands. I would expect everyone to get the very basics, such as: tda1541 is a 16 bit dac.
When I say 17 bit input I am talking about the logic, obviously. To be clear: the logic circuit at the input that interfaces with the two dacs. I thought I made that clear in the previous posts.
Lcsaszar, I think you got it already, but just to be clear: nothing stops you from having a 17 bit input into the logic circuit and in this manner you will fully realize the potential of this circuit (a true 17 bit sign magnitude dac).
If you want to use only a 16 bit input you still get the benefit of a better behaved dac around the zero crossing. Your 16 bits input will certainly be dithered already, I would not add a random lsb in this case.
Also, please take notice of the two zeros at bipolar zero. That is, one of the segments needs addition of 1 LSB, otherwise there will be a repeated code at the zero crossing. The logic has to take care of this.
The last detail is when the 17 bit input is all ones. The logic should not add one lsb to this particular code.
Thanks,
Alex
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It's clear, Alex. Only this does not give anything. Please understand: the 16-bit number that you transmit to the input of TDA1541, the chip refers to the whole range from -FS to + FS.
Their ability to understand such simple things is truly low, yet they feel somehow superior about it. It is called a Dunning–Kruger effect, so I wouldn't worry about trying to explain it to them since they cannot understand that MSB which acts as sign bit is no longer going into either DAC. It just an information for the glue logic to know how to steer both segments in which 16 LSB bits are going to (the input data is 17-bit long with MSB sign bit).
In the distance you can already hear them shouting "but without MSB it is 15-bit DAC!!1"...
I agree with both remarks.
One just needs a Windows calc set to Programmer mode and a piece of paper to understand all this
Okay, guys. Let's see how you will laugh after your attempts end in full failure.
A free argument is always better than a payed one...or it isn't? 😕
A pity that new generations do not appreciate Brrritishh sense of humor anymore...
Hi Sserg
Okay, guys. Let's see how you will laugh after your attempts end in full failure.
I think I understand what John is getting at but I’m not smart enough to implement this correctly so I’ll just focus on what I know & learn from the experts here in the forum.
Okay, guys. Let's see how you will laugh after your attempts end in full failure.
I think I understand what John is getting at but I’m not smart enough to implement this correctly so I’ll just focus on what I know & learn from the experts here in the forum.
Hi sumotan,
I just wanted to warn against a mistake. But some are stubbornly wanting to implement an erroneous decision. I have already run out of arguments, it's awkward to repeat them again and again.
OK all the pro and contras here - John, what about measurements? The improvements of Johns approach should be seen in THD+N. ?
Hello
I want to use the WM8804 to replace the CS8412 in my NOS TDA1541 dac.
Since WM8804 are cmos 3.3v out and the TDA1541 are TTL 5v I2s input, I would use buffers for the 3 I2s signals between the WM8804 and the TDA1541.
I have many 74AC04, but it would invert the signal, can I use two 74AC04 in serial for each I2s signals, so it would buffered without inverting the I2s signal ?
Thank
Bye
Gaetan
I want to use the WM8804 to replace the CS8412 in my NOS TDA1541 dac.
Since WM8804 are cmos 3.3v out and the TDA1541 are TTL 5v I2s input, I would use buffers for the 3 I2s signals between the WM8804 and the TDA1541.
I have many 74AC04, but it would invert the signal, can I use two 74AC04 in serial for each I2s signals, so it would buffered without inverting the I2s signal ?
Thank
Bye
Gaetan
Not quite true, ecdesigns John recommended an attenuator on the I2S lines. I suppose direct CMOS driving should be OK, no need to use any buffer.
Hello
Every one I know who do direct CMOS driving from the WM8804 to the TDA1541 just get noise or no output signal.
Thank
Bye
Gaetan
TDA1541A will work fine with 3.3V on its input. AFAIR TTL levels define >= 2.0V as H and <= 0.8V as L.
Hello
Some times ago, I've read in few web pages or forums, about guys who use the WM8804 or WM8805 with the TDA1541 in NOS mode, and the output signal was not good, they use buffers for I2S signal and they get a good output signal. Maby the WM8804 or WM8805 cannot have enough current to drive the WS, BCK, and DATA signal of the TDA1541.
I did trace back only one of those page but here it is.
Twisted Pear S/PDIF WM8804 Transceiver Module on TDA1541A problem
Thank
Bye
Gaetan
Some times ago, I've read in few web pages or forums, about guys who use the WM8804 or WM8805 with the TDA1541 in NOS mode, and the output signal was not good, they use buffers for I2S signal and they get a good output signal. Maby the WM8804 or WM8805 cannot have enough current to drive the WS, BCK, and DATA signal of the TDA1541.
I did trace back only one of those page but here it is.
Twisted Pear S/PDIF WM8804 Transceiver Module on TDA1541A problem
Thank
Bye
Gaetan
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Hello Geatan,
the 74ACxxx family produces a great amount of switching noise.
It's better to use a non inverting buffer (e.g. 74HC125) since every additional gate
increases jitter level.
the 74ACxxx family produces a great amount of switching noise.
It's better to use a non inverting buffer (e.g. 74HC125) since every additional gate
increases jitter level.