Theoretically, with enough complexity in the spice models of a circuit and its components and interconnections, coupled with enough understanding of the numerical methods being used, a spice circuit simulation could match reality to within any desired accuracy.
Therefore, the same conclusions about the ultimate performance of a circuit could be made from spice THD results as could be made from measured THD results.
Whether or not useful conclusions about the ultimate performance of a circuit could be made from any THD results might be a valid question but the potential validity of spice simulations would not be involved.
The fact that most typical spice circuit models are gross simplifications of reality is already well known by everyone here. The question should not be about whether or not some or all of their results are useless, but rather about how limited their usefulness might be.
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Sims sometimes got it wrong "the wrong way" compared to reality too. An amp designed performed worse with a certain technique in the sim. Real measurements revealed THD of the real thing to be actually better, at around 0.00014% THD @ 10KHz (-117dB) compared to 0.010% (from 0.003% without the technique in the sim). Go figure 😉
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This is the phenomenan I just descibed in my previous post. It's attributed to the fact that the simulator is still a digital domain. It doesn't have an infinitely dense timescale like the real world. If you are to simulate at 20KHz you will have to set the timebase so incredibly small that you get computational rounding errors. Besides, simulating with an extremely small time scale becomes extremely slow on most machines.
@goatee below: Yes, that's what I'm saying.. Waiting for the sim to reach a steadystate on a very small timescale takes way too long, even on my overclocked machine 🙂
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It all depends on the model and the simulation technique. For THD analysis in LTspice, for example, even with a perfect model and small-enough timesteps for the simulation, one would need to be sure that everything had settled to steady state well-enough, and that an exact whole number of cycles of the output signal were being analyzed.
Don't get me wrong, I'm not against simulating at all. In fact with my latest amp design I started out in the simulator, optimized as best as I could, built the thing for real and optimized further for real. The sim results were pretty close to real results though frankly, real results turned out to be actually better than in the simulator. I've been going back between the sim and reality to cross optimize and the end result in my opinion is impressive.
No worries. I wasn't assuming anything about your relationships with simulators. 🙂
Your experiences are interesting, though. I remember how ugly things could get when I tried simulating amps using more-realistic models of speakers and speaker cables (from westhost.com, I think).
Simulators can be great tools for both learning/playing and actual design and analysis work. But it's still too easy to bump up against their real-world practicality limitations.
I noticed that fairly often there might be some extremely high frequency artifacts involved, which could slow the simulation down to maybe even femtosecond speeds. Maddening. Sometimes I could eliminate those types of behaviors just by adding realistic ESR values to the ideal capacitor models, for example (which should always be done, anyway, IMO), or by using standard RF-killing techniques (which should also be in every amp, anyway).
Back when I was still heavily involved in spice simulation, one of the last things I was working on incorporating was frequency-dependent and temperature-dependent models of capacitors. There was one company that actually started providing such data, and even the spice models that implemented the needed techniques. Oh yeah, now I remember: it was Cornell Dubilier. They had a great Java applet on their website, for that. Cool stuff. I remember being quite shocked by how much temperature and frequency could affect the characteristics of electrolytic caps! IMO, everyone should at least be using different ESR values for different frequencies, for simulations with electrolytics.
Your experiences are interesting, though. I remember how ugly things could get when I tried simulating amps using more-realistic models of speakers and speaker cables (from westhost.com, I think).
Simulators can be great tools for both learning/playing and actual design and analysis work. But it's still too easy to bump up against their real-world practicality limitations.
I noticed that fairly often there might be some extremely high frequency artifacts involved, which could slow the simulation down to maybe even femtosecond speeds. Maddening. Sometimes I could eliminate those types of behaviors just by adding realistic ESR values to the ideal capacitor models, for example (which should always be done, anyway, IMO), or by using standard RF-killing techniques (which should also be in every amp, anyway).
Back when I was still heavily involved in spice simulation, one of the last things I was working on incorporating was frequency-dependent and temperature-dependent models of capacitors. There was one company that actually started providing such data, and even the spice models that implemented the needed techniques. Oh yeah, now I remember: it was Cornell Dubilier. They had a great Java applet on their website, for that. Cool stuff. I remember being quite shocked by how much temperature and frequency could affect the characteristics of electrolytic caps! IMO, everyone should at least be using different ESR values for different frequencies, for simulations with electrolytics.
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To get more-realistsic results for a particular amplifier implementation, I think that the complete power supply model would also need to be included in the simualtion. (Yes, it slows it down even more.)
Edit: If anyone is interested in doing that, I once came up with a relatively-easy way to generate a spice model for a power transformer, from simple and quick measurements, which basically required only a variac and a multimeter. The model-development thread is somewhere on this forum but I also have the final model (with built-in instructions and automatic calculation of model parameters from raw measurements) downloadable from http://www.fullnet.com/~tomg/gooteesp.htm .
Sorry about getting so far off-topic with my last few posts. Carry on.
Edit: If anyone is interested in doing that, I once came up with a relatively-easy way to generate a spice model for a power transformer, from simple and quick measurements, which basically required only a variac and a multimeter. The model-development thread is somewhere on this forum but I also have the final model (with built-in instructions and automatic calculation of model parameters from raw measurements) downloadable from http://www.fullnet.com/~tomg/gooteesp.htm .
Sorry about getting so far off-topic with my last few posts. Carry on.
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Yeah I did that at one stage, to see how the buffer capacitors were loaded on low frequency amp output and to figure out the effect of possible powersupply cross over effects.
If one doesn't use loudspeaker equivalent circuits, at least one should use the DC resistance of the coil which often turns out to be much lower than the actual speaker impedance. The woofers I use are 8Ohms nominal but have a DC resistance of 5.6Ohms! When that speaker is driven at its resonance frequency it gets really hungry for current. This again helped me model the buffer caps properly while still maintaining my desired minimum Vds across the mosfet output stages.
Edit: Yeah I can vow for ESR simulation, I noted this when I put a 2u2 cap at the amp output to simulate a difficult load. The amp went completely berzerk on that. But when I added a simulated ESR as low as 0.05Ohms, all was good again.
If one doesn't use loudspeaker equivalent circuits, at least one should use the DC resistance of the coil which often turns out to be much lower than the actual speaker impedance. The woofers I use are 8Ohms nominal but have a DC resistance of 5.6Ohms! When that speaker is driven at its resonance frequency it gets really hungry for current. This again helped me model the buffer caps properly while still maintaining my desired minimum Vds across the mosfet output stages.
Edit: Yeah I can vow for ESR simulation, I noted this when I put a 2u2 cap at the amp output to simulate a difficult load. The amp went completely berzerk on that. But when I added a simulated ESR as low as 0.05Ohms, all was good again.
I think the uF high Q cap load test is stupid in sim and the real world - where it was claimed to sim the load of ESL loudspeakers with built in stepup xmfr
the xfmr have significant winding R, leakage L - you can see the leakage L resonating with the load C on impedance plots at only an octave or so above audio
maybe direct drive of piezo tweeters would be close to a ideal C - even then resistive padding of level is likely to be in the way in a loudspeaker XO
nF of cable C could have fairly high Q - but transmission line effects are begining at typical amp loop gain intercept frequencies - I'd use Theil/Zobel at the ouput and test with 100pF-10 nF Cload for domestic amps
the xfmr have significant winding R, leakage L - you can see the leakage L resonating with the load C on impedance plots at only an octave or so above audio
maybe direct drive of piezo tweeters would be close to a ideal C - even then resistive padding of level is likely to be in the way in a loudspeaker XO
nF of cable C could have fairly high Q - but transmission line effects are begining at typical amp loop gain intercept frequencies - I'd use Theil/Zobel at the ouput and test with 100pF-10 nF Cload for domestic amps
untrue & useless?
Hi Mike,
Normally, I don't read your comments, as you are on my ignore list. But this one I saw by accident. Reason: I was playing with Windows 8 and not logged into this forum with my user name, hence the accident...
As for your request to run a simulation, normally I would ask: why don't you do it yourself and substantiate your bold statements by showing the results of your own simulations. For a man with your stature wouldn't that be a snap?
Anyhow, this time you are lucky, as I've already simulated Self's TMC amp (with a CFP as well as a EF2 output stage, which gave almost identical results) and I will show the results:
THD20 with TMC simulated: THD20=12ppm; measured THD20+N=15ppm
THD20 with OMC simulated: THD20=40ppm; measured THD20+N=50ppm
Given these figures, are you still insisting that SPICE is useless?
Hi Mike,
Normally, I don't read your comments, as you are on my ignore list. But this one I saw by accident. Reason: I was playing with Windows 8 and not logged into this forum with my user name, hence the accident...
As for your request to run a simulation, normally I would ask: why don't you do it yourself and substantiate your bold statements by showing the results of your own simulations. For a man with your stature wouldn't that be a snap?
Anyhow, this time you are lucky, as I've already simulated Self's TMC amp (with a CFP as well as a EF2 output stage, which gave almost identical results) and I will show the results:
THD20 with TMC simulated: THD20=12ppm; measured THD20+N=15ppm
THD20 with OMC simulated: THD20=40ppm; measured THD20+N=50ppm
Given these figures, are you still insisting that SPICE is useless?
Is there people still believing that simulators dont predict real behaviour ?...
Modern processors have currently more than a billion fet transistors
and are all simulated before being actually built , and they works..
Modern processors have currently more than a billion fet transistors
and are all simulated before being actually built , and they works..
Hi Bob,
Four years ago you were on the other side of the fence regarding distortion simulations.
http://www.diyaudio.com/forums/software-tools/101810-spice-simulation-14.html#post1222964
Bob Cordell said:
What made you change your opinion about the SPICE simulation capabilities? Have you lately built and measured several power amps, and concluded that distortion simulations are trustworthy?
Not to speak for Bob, but I would think time doesn't stand still in the simulator world. The ability to obtain models has improved over the years, so have their accuracies and ofcourse simulation engines themselves are improved on a continual basis. Also the knowledge on how to work with them and configure them has become more widely spread, there's tons of tutorials on the net.
trolling again ???
Waly=Walter=YWN,
And four days later Bob said: "....these simulations should be reasonably relevant."
So, when quoting someone you better read the whole story first, instead of selectively quoting him.
Waly=Walter=YWN,
And four days later Bob said: "....these simulations should be reasonably relevant."
So, when quoting someone you better read the whole story first, instead of selectively quoting him.
SPICE
Yes, very true! Some models (from Motorola, for example) were notoriously bad. Happily, these are tweaked now by the DIY community. The same applies to vertical MOSFETs. In the beginning, the weak inversion wasn't modeled at all, which gave totally erroneous results. The advent of better models (BSIM3 and EKV) has drastically changed this situation.
Again, very true. One has to learn how to put this tool to good use. In this process, a thorough knowledge and insight about audio amplifiers is indispensable, or to cite Tom Gotee (if something gets wrong): "Blame the user, not the tool."
Cheers, E.
Yes, very true! Some models (from Motorola, for example) were notoriously bad. Happily, these are tweaked now by the DIY community. The same applies to vertical MOSFETs. In the beginning, the weak inversion wasn't modeled at all, which gave totally erroneous results. The advent of better models (BSIM3 and EKV) has drastically changed this situation.
Again, very true. One has to learn how to put this tool to good use. In this process, a thorough knowledge and insight about audio amplifiers is indispensable, or to cite Tom Gotee (if something gets wrong): "Blame the user, not the tool."
Cheers, E.
Hi Edmond,
Glad to see this results.
I would like to mention that while simulating distortion in the circuits, where the linearity is obtained by compensation (LTP, current mirror, JFET common source stage with the same JFET type as a load, etc) please be aware that the measured distortion can be 20-40dB higher. This is because IDENTICAL model is used for both devices. I'm not aware about SPICE which performs Monte Carlo and distortion simulations simultaneously.