Re: Re: Re: Re: Re: Re: Re: I repeat my Request
Hi Glen,
I have a couple questions on your 500W rail-tracking Class A amplifier. It certainly looks like quite a project.
In referring to your BJT stage above, where you said earlier that its distortion makes the 0.06% open-loop output stage distortion quoted by Nelson lame, is that the output stage of the 500W amplifier?
Have you actually built and tested that output stage open-loop? What distortion value did you actually get for it at 20 kHz full-power? (500W balanced into 8 ohms, right?).
In referring to the 60/35 MHz ft Sanken power transistors in the Class-A core, are you referring to the 2SA1295 and the 2SC3264?
Have you SPICE'd the output stage? Where did you get the models for the Sanken transistors?
Thanks,
Bob
G.Kleinschmidt said:
Hi Glen,
I have a couple questions on your 500W rail-tracking Class A amplifier. It certainly looks like quite a project.
In referring to your BJT stage above, where you said earlier that its distortion makes the 0.06% open-loop output stage distortion quoted by Nelson lame, is that the output stage of the 500W amplifier?
Have you actually built and tested that output stage open-loop? What distortion value did you actually get for it at 20 kHz full-power? (500W balanced into 8 ohms, right?).
In referring to the 60/35 MHz ft Sanken power transistors in the Class-A core, are you referring to the 2SA1295 and the 2SC3264?
Have you SPICE'd the output stage? Where did you get the models for the Sanken transistors?
Thanks,
Bob
I wonder where the people like Glen get that much time for such long contributions here. I am not retired yet (some 10 years to work at least 😀 ) and cannot imagine where to get that much time for this. Big ego? 😉
Re: Re: Re: Re: transconductance doubling
Hi Pooge,
I hear ya. Last night when I was driving home I thought to myself, I wonder if Leach even read Self's book before writing this. I checked the dates, and of course Self's book well predated this manuscript. At the same time, still erroneously thinking that the Leach manuscript was a published paper, I wondered to myself that I didn't recall seeing any references. Then I looked, and of course there were none. This is also unusual for a guy like Leach, who is usually very diligent about references.
I agree that Self muddied up the water by coining the term optimum biased Class B. I still think Leach somehow left the tracks on this one for more reason than just semantics. BTW, I believe it was Self who coined the term gm doubling. Is that your understanding?
I'd love to know what paper it was that Leach was reviewing that caused him to write this, and whether that paper ever got published.
Cheers,
Bob
pooge said:
Hi Pooge,
I hear ya. Last night when I was driving home I thought to myself, I wonder if Leach even read Self's book before writing this. I checked the dates, and of course Self's book well predated this manuscript. At the same time, still erroneously thinking that the Leach manuscript was a published paper, I wondered to myself that I didn't recall seeing any references. Then I looked, and of course there were none. This is also unusual for a guy like Leach, who is usually very diligent about references.
I agree that Self muddied up the water by coining the term optimum biased Class B. I still think Leach somehow left the tracks on this one for more reason than just semantics. BTW, I believe it was Self who coined the term gm doubling. Is that your understanding?
I'd love to know what paper it was that Leach was reviewing that caused him to write this, and whether that paper ever got published.
Cheers,
Bob
Re: Re: Re: Re: Re: transconductance doubling
This is a total guess here, but I suspect that the paper Leach reviewed may have used the simulation construct of Leach's figure 10, since this is where he says the misconception arose. I do not know who wrote the paper he reviewed. I'm not even sure if it was an AES paper. It was from Europe, though.
I'm thinking that since my prior analysis hasn't been totally shot down, that it can be said that there really is agreement between Leach and Self here when the numbers are plugged in and the class labels are ignored.
Leach considers his amplifier to be a Class AB amp. His instructions for biasing set 100ma for the supply fuse for the whole amplifier having 2 output pairs, making the bias in each pair less than 50ma. For his .33ohm Re, his paper indicates 75ma is the limit for which transconductance doesn't rise, which is the same as Self's optimum. So Leach regards 50ma-75ma to be in the class AB range, while Self regards 75ma to be class B, with class AB somewhere above 75ma.
So I'm assuming that the people that have said that Leach is wrong on this principle have apparently looked at the class labels instead of the numbers.
Bob Cordell said:
This is a total guess here, but I suspect that the paper Leach reviewed may have used the simulation construct of Leach's figure 10, since this is where he says the misconception arose. I do not know who wrote the paper he reviewed. I'm not even sure if it was an AES paper. It was from Europe, though.
I'm thinking that since my prior analysis hasn't been totally shot down, that it can be said that there really is agreement between Leach and Self here when the numbers are plugged in and the class labels are ignored.
Leach considers his amplifier to be a Class AB amp. His instructions for biasing set 100ma for the supply fuse for the whole amplifier having 2 output pairs, making the bias in each pair less than 50ma. For his .33ohm Re, his paper indicates 75ma is the limit for which transconductance doesn't rise, which is the same as Self's optimum. So Leach regards 50ma-75ma to be in the class AB range, while Self regards 75ma to be class B, with class AB somewhere above 75ma.
So I'm assuming that the people that have said that Leach is wrong on this principle have apparently looked at the class labels instead of the numbers.
Re: Re: Re: Re: Re: Re: transconductance doubling
Here's where I think the bottom line is. Maybe it is just another way of saying what you just said. If you ignore what Leach said in his paper, and just look at his equations, and ignore the Class thing, it appears that:
1) Leach and Self are saying the same thing.
2) Yes, there is transconductance doubling under the conditions where we expect it.
Cheers,
Bob
pooge said:
Here's where I think the bottom line is. Maybe it is just another way of saying what you just said. If you ignore what Leach said in his paper, and just look at his equations, and ignore the Class thing, it appears that:
1) Leach and Self are saying the same thing.
2) Yes, there is transconductance doubling under the conditions where we expect it.
Cheers,
Bob
sorry to drag back a bit ...
a while back, there was some discussion of driving MOSFET gates straight from the VAS (no followers or buffers). i just remembered a borbely design from wireless world from the early 80's (1983 maybe?) that did this. as i recall, it was a complementary symmetry design, bipolars except the lateral hitachi output mosfets. the complementary vas was emitter follower driving a common emitter that was cascoded. the cascode bias voltage set by a string of 5 or 6 diodes. The common emitter stage was biased at about 50mA.
anyone remember it?
mlloyd1
a while back, there was some discussion of driving MOSFET gates straight from the VAS (no followers or buffers). i just remembered a borbely design from wireless world from the early 80's (1983 maybe?) that did this. as i recall, it was a complementary symmetry design, bipolars except the lateral hitachi output mosfets. the complementary vas was emitter follower driving a common emitter that was cascoded. the cascode bias voltage set by a string of 5 or 6 diodes. The common emitter stage was biased at about 50mA.
anyone remember it?
mlloyd1
Glen, pretty interesting design. You might think about using dual jfets on the inputs to lower potential noise, but the rest looks like what we like to do.
Why in pararelled mosfet output stage, if it is blown away, all the mosfets are blown away? In pararelled bipolar output stage, sometimes only 1 or 2 transistor that is broken, but not the whole pararelled bank.
Hi Daniel,
To jump in. When a mosfet fails it normally destroys the gate insulator to drain potential. Don't ask me why. So all teh gates in parallel get hit with the voltage across the protection zeners (if they exist, else drain voltage) until either the zener shorts, or the gate resistor burns open. More than enough time to destroy the rest of them. Of course the action of a DC servo of diff pair cranks the other bank fully on to compensate. At some point a fuse blows, but it's generally johnny-come-lately.
I have run across amplifiers where only one or two mosfets are shorted. The gate resistors had opened up and zeners shorted. I have also seen similar things happen with BJT's if you get a collector-base short. No zeners, but then it really doesn't matter. Series base resistors are the only way to save the rest of them.
Regardless of the technology, it's always best to replace all the outputs and drivers at the very least. One stage back of the last failed part. The bias components are obvious things to replace as well.
-Chris
To jump in. When a mosfet fails it normally destroys the gate insulator to drain potential. Don't ask me why. So all teh gates in parallel get hit with the voltage across the protection zeners (if they exist, else drain voltage) until either the zener shorts, or the gate resistor burns open. More than enough time to destroy the rest of them. Of course the action of a DC servo of diff pair cranks the other bank fully on to compensate. At some point a fuse blows, but it's generally johnny-come-lately.
I have run across amplifiers where only one or two mosfets are shorted. The gate resistors had opened up and zeners shorted. I have also seen similar things happen with BJT's if you get a collector-base short. No zeners, but then it really doesn't matter. Series base resistors are the only way to save the rest of them.
Regardless of the technology, it's always best to replace all the outputs and drivers at the very least. One stage back of the last failed part. The bias components are obvious things to replace as well.
-Chris
john curl said:
John,
Can you suggest part numbers/suppliers for these dual jfets? I had a look recently and the only part I found was available for $3 at 1,000 MOQ.
Cheers,
Tony
The days of cheap dual jfets is over. I don't know why, but Toshiba bailed out on us. You can still handmatch single jfets with little difficulty, IF you use a servo to compensate for any residual offset or temp drift. Still, I personally would not go back to bipolar devices. They can become hard to get as well, and many popular types were dropped over the years.
john curl said:
Good day Mr Curl,
Whether jfets produce less noise than bjts depends on the source resistance of system (Zo of the pre-amp and the resistance of the input filter, FB network and emitter/source degeneration resistors), normally in the order of 100..1000 Ohms. Under these conditions BJTs are the preferred choice as input devices. Please also see the attachment.
Cheers, Edmond.
John Curl's patent for MC preamp is using bipolar. Now he uses Jfet. This makes Jfet better than bipolar (for noise sensitive MC preamp) ?
john curl said:
Hi John,
I used to like the National NPD5564, but they are gone. Have you had any experience with the Linear Systems dual JFETs? Maybe I've got the name not quite right, but they advertize in AudioXpress.
Bob
PMA said:
Hi Pavel,
It depends on the kind of nonlinearity of the ear. If your ears distort in a square-root manner, you better off with the quadratic behavior of a FET for a optimal compensation of nonlinearities. However, my ears (and most others) react in a logarithmic way, so I prefer the exponential behavior of a BJT.
BTW, we were talking about noise, not sonic merits.
Cheers, Edmond.
Hi Edmond,
from your post I can see you have never tried to compare in real circuits and listening tests.
Regards,
Pavel
from your post I can see you have never tried to compare in real circuits and listening tests.
Regards,
Pavel
Hi Edmond,
You are comparing noise performance due to source resistance. This has merit, but you need to look at the actual system noise performance of both and also the low frequency corner of the noise.
From what I've seen, Jfets have lower noise. You also can not allow bias currents to flow through a phono cartridge or tape head. Correcting this may blow the noise figure out of the water for BJT's.
-Chris
You are comparing noise performance due to source resistance. This has merit, but you need to look at the actual system noise performance of both and also the low frequency corner of the noise.
From what I've seen, Jfets have lower noise. You also can not allow bias currents to flow through a phono cartridge or tape head. Correcting this may blow the noise figure out of the water for BJT's.
-Chris
Yes Edmond, I read the same thing 35 years ago, BUT it is not true today.
Let us quickly look at the REAL difference between an ideal bipolar transistor and a JFET. The fundamental noise for a bipolar transistor is .5(1/Gm), the fundamental noise for a JFET is 2/pi (1/Gm). With nearly ideal devices, the difference is small, especially if you operate the JFET at higher currents, such at 5-15ma.
Still, you might think that the bipolar transistor has a slight advantage, BUT NO! Not in Glen's design example that I specifically referred to, because the inputs (bases) are not effectively shorted to ground (from a noise point of view). This makes the bipolar transistor's base CURRENT noise generator dominant and you might as well forget about the ideal noise.
Linear systems makes OK to good fets, BUT they are somewhat overpriced, and not as good in some ways as the original Toshiba parts. However, they will do in small scale production, or amateur efforts.
Erno Borbley is still a good way to buy critical parts. I know that they 'seem' expensive, but that is all that is left in the world, so to speak, and Erno, like the rest of us, needs to make a profit from his forsight in purchasing jfets in the easy times, and storing them for future projects.
Let us quickly look at the REAL difference between an ideal bipolar transistor and a JFET. The fundamental noise for a bipolar transistor is .5(1/Gm), the fundamental noise for a JFET is 2/pi (1/Gm). With nearly ideal devices, the difference is small, especially if you operate the JFET at higher currents, such at 5-15ma.
Still, you might think that the bipolar transistor has a slight advantage, BUT NO! Not in Glen's design example that I specifically referred to, because the inputs (bases) are not effectively shorted to ground (from a noise point of view). This makes the bipolar transistor's base CURRENT noise generator dominant and you might as well forget about the ideal noise.
Linear systems makes OK to good fets, BUT they are somewhat overpriced, and not as good in some ways as the original Toshiba parts. However, they will do in small scale production, or amateur efforts.
Erno Borbley is still a good way to buy critical parts. I know that they 'seem' expensive, but that is all that is left in the world, so to speak, and Erno, like the rest of us, needs to make a profit from his forsight in purchasing jfets in the easy times, and storing them for future projects.