Bob Cordell Interview: BJT vs. MOSFET

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#1,164
#1,166
x-pro said:


Well done, Rodolfo! Now you know why it could be so important 🙂

Cheers

Alex
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A word of clarification nonetheless. I do not consider myself qualified to side on the current discussion regarding Cgs (and others) variability.

What I became aware then was about the serious problem posed by the FET input capacitance during crossover, if Vgs is allowed to drop to 0 during the non conducting half cycle in class B/AB.

Next best in my mind was to arrange Vgs to never drop below Vth.

Rodolfo
 
#1,167
ingrast said:


A word of clarification nonetheless. I do not consider myself qualified to side on the current discussion regarding Cgs (and others) variability.
Click to expand...

It is a good point. My measurements are not enough to make correct conclusions anyway. It only serves the point of a possible problem with an input capacitance interpretation in a standard model, as in this particular experiment the capacitance in a real device and in a model behave differently

ingrast said:
What I became aware then was about the serious problem posed by the FET input capacitance during crossover, if Vgs is allowed to drop to 0 during the non conducting half cycle in class B/AB.
Click to expand...

A possible reason for it that there is essentially a wasted charge, which is considerably larger than one required to operate the device in a linear region.

ingrast said:
Next best in my mind was to arrange Vgs to never drop below Vth.

Rodolfo
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And that looks like a good solution for class AB.

Cheers

Alex
 
#1,170
estuart said:

Hi Glen,
...............
In stead of TMC, you might consider NDFL, but, combined with a complementary VAS, it's probably difficult to implement.
.............
Regards, Edmond.
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Hi Glen,
I've figured out to do this and I've broken the 1ppm barrier.
Some results:
Vo = 19.5Vpp into 4 Ohm -> THD20 = 3ppm W/O TMC
THD20 = 0.8 ppm with TMC.

Also,I solved the problem of the "fighting VAS's", as described by Bob Cordell, see:
http://www.diyaudio.com/forums/showthread.php?s=&threadid=94676&perpage=10&pagenumber=15 post #145

I you're interested, I'll post a preliminary schematic.

Cheers, Edmond.
 
#1,171
ingrast said:
Thanks Edmond, I was no aware about this reference, could you provide a link or a copy to check?
Rodolfo
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Hi Rodolfo,

I've only a paper copy, no scanner and no link, sorry. :sad:
Maybe someone else on the forum does have a digital copy. So folks, please do help Rodolfo.
Without any results in a couple of days, please remind me and I'll digitize it on a scanner of one of my friends.

Cheers,
 
#1,173
ingrast said:
Don't worry Edmond, on the other hand, if you can do a quick sketch of the arrangement as in a simulator, it could be enough to evaluate.
Thanks again, Rodolfo
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Hi Rodlfo,

See below. This scheme is based on a non-linear common-mode control loop, which is also applicable to BJT's , common source/emitter or common drain/collector topologies.

Cheers,

PS: Please. don't ask me why Marcel has added Q8.
 
#1,175
x-pro said:
I've posted my measurement results of Cgs for a couple of MOSFETs in a new thread:

http://www.diyaudio.com/forums/showthread.php?s=&threadid=100550

Alex
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Hi Alex,

I've been following this discussion between you and Andy with great interest. You've both made some very good points. I've looked at the measurements you posted for the ZTX part and I think you may have inadvertantly confirmed some of what Andy has been saying, but I'm not sure. My bottom line suspicion is that you are both still talking about operation in two different regimes.

Notice that the input capacitance for the ZTX device with 5V on the drain rises sharply at a Vgs of about 2.1 to 2.2 V. Now look at the curve of Id vs Vgs. It is clear that the device has gone above threshold and turned on and entered the linear region long before the gate voltage at which the input capacitance increased sharply. Indeed, threshold is on the order of only about 1.1V.

More significantly, the device is actually entering a highly non-linear regime in the vicinity of Vgs = 2.1V, where the device is actually running out of gas. Look at the Id vs vgs curve. It actually goes flat at vgs of about 2.2V. Were this a vertical power MOSFET like an IRfp240, this would correspond to an enormously high current, way in excess of 10 Amps, a current that we virtually never go to in normal linear operation on a per-device basis.

Let me know what you think. I could be wrong.

In any case, thanks for doing these interesting measurements.

Cheers,
Bob
 
#1,176
estuart said:


Hi Rodlfo,

See below. This scheme is based on a non-linear common-mode control loop, which is also applicable to BJT's , common source/emitter or common drain/collector topologies.

Cheers,

PS: Please. don't ask me why Marcel has added Q8.
Click to expand...


I see, the added complexity basically stemming from the common source configuration. Remarkably, the sensing differential is configured like mine, another example of convergent ideas !!

As to the other thread pointed by Alex, I did not notice it (it started later than my linked posts) but aim to the same idea and similar implementations.

A further comment, I noticed both compensation capacitors in the control feedback loop, or the inclusion of operational amplifiers. I should strongly advise against this.

Compensation should not be necessary with proper transistor selection and loop gain. Remember the circuit is fully operational in the crossover region and beyond so it is contributing to output stage bandwidth / pole distribution. I prefer to keep it as unobstrusive as practical keeping the highest bandwidth through a minimum of properly selected active devices. By the same token, OpAmps are neither a good idea here except may be wideband ones, but in any case there is no need for very large loop gain since we are not interested in keeping an exact standby current, only some reasonable current at all to prevent power device switching from cutoff to conduction.

Rodolfo
 
#1,177
Bob Cordell said:
Notice that the input capacitance for the ZTX device with 5V on the drain rises sharply at a Vgs of about 2.1 to 2.2 V. Now look at the curve of Id vs Vgs. It is clear that the device has gone above threshold and turned on and entered the linear region long before the gate voltage at which the input capacitance increased sharply. Indeed, threshold is on the order of only about 1.1V.

More significantly, the device is actually entering a highly non-linear regime in the vicinity of Vgs = 2.1V, where the device is actually running out of gas. Look at the Id vs vgs curve. It actually goes flat at vgs of about 2.2V. Were this a vertical power MOSFET like an IRfp240, this would correspond to an enormously high current, way in excess of 10 Amps, a current that we virtually never go to in normal linear operation on a per-device basis.
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Hi Bob,

the Id curve for ZVN device is a logarithmic one and it is other way around - it does not go "flat" at 2.2 V but rather goes from what called a "subthreshold" area, where the Id depends on Vgs logarithmically (so it looks "linear" on a log scale), to a "normal" square-law region which just looks "flat". I've got the same graph on a linear scale and will post it later - you'll see the difference. Actual Ciss "jump" corresponds to Id 0f 1-40 mA area for this device

BTW, this "subthreshold" area also is not simulated properly in most SPICE MOSFET models 🙁 .

As you may see from the latest data I've posted in my thread, IRL530N does this "capacitance jump" in the area of 2V with 5V on the drain. It corresponds to a drain current between few tens of mA and about 0.5A (I didn't have a heatsink on the device so measured it quickly at the highest point 🙂 ) .

It looks like a really serious problem in MOSFET linear applications.

Cheers

Alex
 
#1,179
ingrast said:

I see, the added complexity basically stemming from the common source configuration. Remarkably, the sensing differential is configured like mine, another example of convergent ideas !!

A further comment, I noticed both compensation capacitors in the control feedback loop, or the inclusion of operational amplifiers. I should strongly advise against this.

Compensation should not be necessary with proper transistor selection and loop gain. Remember the circuit is fully operational in the crossover region and beyond so it is contributing to output stage bandwidth / pole distribution. I prefer to keep it as unobstrusive as practical keeping the highest bandwidth through a minimum of properly selected active devices. By the same token, OpAmps are neither a good idea here ................

Rodolfo
Click to expand...

Hi Rodolfo,

I also don't understand why Marcel used these compensating caps (and that funny Q8). Anyhow, I fully agree with you on that matter. In Marcel's real implementation, there is no op-amp (that was my idea to simplify the schematic), rather a discrete input stage.

BTW, are you buzzy with real common source O/P stages? As a matter of fact I do, but these sky rocketing Cgd's at full output swing are a nightmare.

Cheers,
 
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