1) it use the same FPGA and same uC as usual, so should be able to use same firmware, there are some differences, so new firmware are needed and will autodetect board.
2) The shift registers are now also in the smaller qfn packaging as used on other boards, so I don't need to stock the tssop types anymore....
3) Output shift registers now running at 1.4M/1.5M sample rate, making FIR2 filter different. Will require new filter file, but plan to use same filter file for both old and new boards, firmware will load filters as needed.
4) The R-2R network is now 24+3+1, ie 24 bit classic R-2R network, 3 bit thermometer network, plus the sign, total 28 bits.
5) Yes, still same Si514 clock, but now in a small package (like I use on other boards), and it drives the shift registers directly, no added jitter by going though the FPGA. People who want to bitch about the Si514, please go elsewhere, we have heard you multiple times....
6) The clock Power supply is separate and use a LP2907 low noise regulator.
7) New vref supplies, like used on the dac2541. For those who want details, yes it use a opamp with transistor buffer, with a polymer output capacitor. Lower vref impedance from DC to Megahertz.
8) Those are powered at +-5.4V from LM317/LM337 pre regulators.
9) Output opamps are opa1678.
10) Power in are now DC only, optimal is +- 9V.
11) The board is mechanical and almost electrical compatible with previous version of the dam1021.
12) J9 is 4 bits user i/o, planning to use it for additional SPDIF inputs.
13) The non isolated serial management port is now TTL levels, not real RS232 levels. So get the right USB to serial adapter....
I know people want to experiment anyway, but there is nothing to gain by vref or power supply modifications....
To simplyfying stock keeping I will probably only make dam1021-12.
